3.13 Electronics (A-level only) — revision question pack

18 specification points · notes, questions, answers and worked methods

Checked against AQA 7408 section 3.13. Review basis: the qualification registry sourced from the AQA A-level Physics (7408) specification; registry verification recorded 11 July 2026.

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Answer all questions in the spaces provided.

3.13.1.1 · MOSFET (metal-oxide semiconducting field-effect transistor)

Explanation

  • The required MOSFET is an n-channel enhancement-mode device with gate, drain and source terminals. An insulating oxide separates the gate from the conducting region, giving a very high input resistance and negligible steady gate current.
  • The gate–source potential difference VGSV_{\mathrm{GS}} controls drain current.
  • Below threshold VthV_{\mathrm{th}}, the channel is absent and the device is off; above threshold, a channel forms and drain current can flow.
  • Output characteristics show IDI_{\mathrm D} against VDSV_{\mathrm{DS}} for different gate voltages, including IDSSI_{\mathrm{DSS}} where specified.
  • As a switch, a voltage applied at the high-resistance gate controls a much larger load current.
Simplified n-channel enhancement MOSFET structure showing the insulated gate, drain and source.

Worked example

A MOSFET has threshold voltage 2.5V2.5\,\text{V}. State its switching state for VGS=1.8VV_{\mathrm{GS}}=1.8\,\text{V} and for VGS=4.0VV_{\mathrm{GS}}=4.0\,\text{V}.

  1. 1.Compare each gate–source potential difference with VthV_{\mathrm{th}}.
  2. 2.1.8V<2.5V1.8\,\text{V}<2.5\,\text{V}, so no conducting channel forms.
  3. 3.4.0V>2.5V4.0\,\text{V}>2.5\,\text{V}, so an n-channel forms and the device can conduct.

Answer: The device is off at 1.8V1.8\,\text{V} and on at 4.0V4.0\,\text{V}.

Common mistakes

  • Don't treat the gate as a current-operated input and expect a large steady gate current.
  • Don't interchange the drain, source and gate labels on the device or characteristic.
  • Don't claim VGS=VthV_{\mathrm{GS}}=V_{\mathrm{th}} guarantees a fully conducting switch rather than the onset of channel formation.

Exam tip

When reading characteristics, identify the selected VGSV_{\mathrm{GS}} curve before taking IDI_{\mathrm D} or VDSV_{\mathrm{DS}}.

Tier 1 · Easy

  1. State the condition involving VGSV_{\mathrm{GS}} and VthV_{\mathrm{th}} for an enhancement-mode n-channel MOSFET to begin conducting.

    [1 mark]

    Total for this question: 1

  2. State what is meant by IDSSI_{\mathrm{DSS}} for a MOSFET.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. A 9.0V9.0\,\text{V} moisture alarm has a sensor of resistance RR from the positive supply to a MOSFET gate and a 1.5MΩ1.5\,\text{M}\Omega resistor from the gate to 0V0\,\text{V}. The MOSFET threshold voltage is 3.0V3.0\,\text{V}. Determine RR when the MOSFET first switches on.

    [3 marks]

    Total for this question: 3

  2. The gate of an n-channel MOSFET is connected to a 6.00V6.00\,\text{V} supply through a 22.0MΩ22.0\,\text{M}\Omega resistor. Although the normal steady gate current is negligible, a fault current of 30.0nA30.0\,\text{nA} in the gate circuit flows through this resistor. The source is at 0V0\,\text{V}. Calculate VGSV_{\mathrm{GS}}.

    [2 marks]

    Total for this question: 2

  3. A logic output connected to the gate of an n-channel enhancement-mode MOSFET alternates between 0.30V0.30\,\text{V} and 4.80V4.80\,\text{V}. Its source terminal is held at 0V0\,\text{V}; replacement MOSFETs have threshold voltages between 1.7V1.7\,\text{V} and 2.4V2.4\,\text{V}. Determine the guaranteed switching state at each logic level and explain why the logic output supplies negligible steady power to the gate.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A MOSFET controls a 120Ω120\,\Omega load from a 9.0V9.0\,\text{V} supply. At the applied gate voltage its output characteristic is approximated by ID=48mAI_{\mathrm{D}}=48\,\text{mA} for VDS2.0VV_{\mathrm{DS}}\geq2.0\,\text{V}. Use load-line reasoning to determine the operating values of VDSV_{\mathrm{DS}}, load power and MOSFET power. Deduce whether the MOSFET is acting as an efficient fully-on switch.

    [4 marks]

    Total for this question: 4

  2. Explain how the simplified structure of an n-channel enhancement-mode MOSFET gives both a very high input resistance and voltage-controlled switching.

    [4 marks]

    Total for this question: 4

  3. When fully on, a MOSFET switch behaves as a fixed resistance of 6.0Ω6.0\,\Omega between drain and source. It connects a load of resistance 42Ω42\,\Omega to a 24V24\,\text{V} supply. Calculate the current, the power dissipated in the MOSFET, and the percentage of the supply power that is wasted in the MOSFET.

    [3 marks]

    Total for this question: 3

  4. For one fixed value of VGSV_{\mathrm{GS}}, read-offs from a MOSFET output characteristic give ID=0.16AI_{\mathrm D}=0.16\,\text{A} at VDS=0.50VV_{\mathrm{DS}}=0.50\,\text{V}, 0.29A0.29\,\text{A} at 1.0V1.0\,\text{V}, and 0.34A0.34\,\text{A} at both 2.0V2.0\,\text{V} and 4.0V4.0\,\text{V}. A student says that the drain current is independent of VDSV_{\mathrm{DS}} whenever the MOSFET is on. Calculate the percentage increase in drain current from 0.50V0.50\,\text{V} to 2.0V2.0\,\text{V}. Discuss whether the student is correct.

    [4 marks]

    Total for this question: 4

  5. A MOSFET gate is connected to a control output through a 4.7MΩ4.7\,\text{M}\Omega resistor. An ideal voltmeter, which draws no current, is used for both measurements. The potential difference across the resistor is 4.7μV4.7\,\mu\text{V} and the gate-source potential difference is 4.0V4.0\,\text{V}. At this setting the drain current is 0.24A0.24\,\text{A}. Treat the resistor current as steady gate leakage. Determine the gate current, the MOSFET input resistance and the ratio ID/IGI_{\mathrm D}/I_{\mathrm G}.

    [3 marks]

    Total for this question: 3

3.13.1.2 · Zener diode

Explanation

  • A Zener diode has an anode and cathode and is used in reverse bias. Its characteristic has a sharp breakdown at the Zener voltage VZV_{\mathrm Z}.
  • Beyond this point, a large change in reverse current causes only a small change in voltage, provided current remains above the typical minimum operating value.
  • A series resistor is essential because it limits current and drops the remaining supply voltage.
  • The nearly constant diode voltage can serve as a constant-voltage source or reference voltage.
  • The specification does not require a full stabiliser treatment, but characteristic questions may require identification of forward conduction, reverse leakage, breakdown voltage and minimum operating current.
The Zener characteristic has a sharp reverse-breakdown region at VZV_{\mathrm Z}.

Worked example

A 6.8V6.8\,\text{V} Zener reference is connected to a 12.0V12.0\,\text{V} supply through 330Ω330\,\Omega. Calculate the Zener current when no load is connected.

  1. 1.The resistor potential difference is 12.06.8=5.2V12.0-6.8=5.2\,\text{V}.
  2. 2.Use I=V/RI=V/R for the series resistor.
  3. 3.I=5.2/330=1.58×102AI=5.2/330=1.58\times10^{-2}\,\text{A}.

Answer: The Zener current is 15.8mA15.8\,\text{mA}.

Common mistakes

  • Don't place the Zener in forward bias when using the reverse-breakdown voltage reference.
  • Don't omit the series resistor, because this provides no limit on breakdown current.
  • Don't read the reverse-breakdown voltage from the forward-conduction branch of the characteristic.

Exam tip

On a characteristic, label anode, cathode and reverse-bias polarity before identifying VZV_{\mathrm Z}.

Tier 1 · Easy

  1. State the bias direction and operating region used when a Zener diode provides a constant-voltage reference.

    [1 mark]

    Total for this question: 1

  2. State the purpose of the resistor connected in series with a reverse-biased Zener diode.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. A no-load voltage reference uses a 5.6V5.6\,\text{V} Zener diode on a 12.0V12.0\,\text{V} supply. Calculate the series resistance required for a Zener current of 16mA16\,\text{mA}.

    [3 marks]

    Total for this question: 3

  2. Explain how the reverse-bias characteristic of a Zener diode shows that it can provide a reference voltage.

    [3 marks]

    Total for this question: 3

  3. A loaded reference uses a 7.5V7.5\,\text{V} Zener diode connected to a 14.0V14.0\,\text{V} supply through a 240Ω240\,\Omega series resistor, with a load in parallel with the diode. While the diode remains in breakdown, determine the power dissipated by the series resistor and deduce the smallest of the 0.125W0.125\,\text{W}, 0.25W0.25\,\text{W} and 0.50W0.50\,\text{W} ratings that is suitable.

    [2 marks]

    Total for this question: 2

Tier 3 · Hard

  1. A 6.2V6.2\,\text{V} Zener circuit is supplied from a fixed 14.0V14.0\,\text{V} source. The parallel load can draw up to 18mA18\,\text{mA} and the Zener needs at least 5.0mA5.0\,\text{mA}. Determine the largest suitable series resistor from 330Ω330\,\Omega, 360Ω360\,\Omega and 390Ω390\,\Omega, and then determine minimum safe power ratings for the resistor and Zener when the load is disconnected.

    [5 marks]

    Total for this question: 5

  2. A 6.8V6.8\,\text{V} Zener reference is supplied from a 14.0V14.0\,\text{V} source through a fixed 330Ω330\,\Omega resistor. The Zener diode needs at least 5.0mA5.0\,\text{mA} to remain in breakdown. Determine the maximum load current that the reference can supply. Explain what happens to the output potential difference if the load current is increased beyond this value.

    [4 marks]

    Total for this question: 4

  3. The graph of a Zener diode's reverse characteristic is a straight line through the read-off points (8.0mA,6.05V)(8.0\,\text{mA},6.05\,\text{V}) and (28.0mA,6.25V)(28.0\,\text{mA},6.25\,\text{V}). The reverse-biased diode is connected to an 11.0V11.0\,\text{V} supply through 180Ω180\,\Omega, with no load. Use the graph readings and the resistor relation to determine the operating current and Zener potential difference.

    [4 marks]

    Total for this question: 4

  4. A 6.2V6.2\,\text{V} Zener diode is modelled as a constant-voltage source while it is in breakdown. It is connected to a variable supply through a 270Ω270\,\Omega series resistor. The Zener current is increased from 8.0mA8.0\,\text{mA} to 26mA26\,\text{mA}. State the change in Zener potential difference. Determine the supply potential at the second current and the increase in power dissipated by the Zener diode.

    [3 marks]

    Total for this question: 3

  5. A 4.7V4.7\,\text{V} Zener reference has a fixed 270Ω270\,\Omega series resistor and a 1.20kΩ1.20\,\text{k}\Omega load connected across the diode. The Zener current must remain between 3.0mA3.0\,\text{mA} and 24mA24\,\text{mA}. Determine the range of supply potentials for which the reference operates within these limits, and calculate the greatest Zener power in that range.

    [4 marks]

    Total for this question: 4

3.13.1.3 · Photodiode

Explanation

  • A photodiode produces a current when radiation creates charge carriers. Its current–voltage characteristic shifts with illumination, and a spectral-response curve shows that sensitivity depends on wavelength.
  • In the required photoconductive mode, the device is reverse biased and used as a detector in an optical system; greater incident intensity produces a larger reverse photocurrent over its useful range.
  • A photodiode can also be coupled to a scintillator.
  • An atomic particle deposits energy in the scintillator, which emits a flash; the photodiode converts that flash into an electrical pulse.
  • Examiners may ask for interpretation of characteristic or spectral-response graphs and the complete particle-to-light-to-electrical detection chain.
A photodiode's spectral response varies with wavelength and peaks over a limited range.

Worked example

Explain how a photodiode and scintillator detect an atomic particle.

  1. 1.The particle deposits energy in the scintillator.
  2. 2.The scintillator converts some deposited energy into a flash of light.
  3. 3.The reverse-biased photodiode detects the flash as a current pulse.

Answer: The detection chain is particle energy, scintillator light pulse, then photodiode electrical pulse.

Common mistakes

  • Don't describe the photodiode as changing resistance like an LDR rather than producing a photocurrent.
  • Don't use forward bias when describing the required photoconductive detector mode.
  • Don't say the atomic particle directly creates the photodiode pulse and omit the scintillator flash.

Exam tip

For graph interpretation, quote both the wavelength region and the relative response rather than merely naming the peak.

Tier 1 · Easy

  1. Name the operating mode of a photodiode that has an external reverse-bias voltage.

    [1 mark]

    Total for this question: 1

  2. State the type of graph used to show how a photodiode's sensitivity varies with wavelength.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. A photodiode has responsivity 0.42A W10.42\,\text{A W}^{-1} at the wavelength used. Radiation of power 8.0μW8.0\,\mu\text{W} reaches it and its photocurrent passes through a 180kΩ180\,\text{k}\Omega resistor. Calculate the magnitude of the resistor voltage.

    [3 marks]

    Total for this question: 3

  2. At its most sensitive wavelength a photodiode has responsivity 0.50A W10.50\,\text{A W}^{-1}. Its spectral-response curve has relative response 0.600.60 at 900nm900\,\text{nm}. Calculate the photocurrent produced at 900nm900\,\text{nm} by 12μW12\,\mu\text{W} of radiation.

    [3 marks]

    Total for this question: 3

  3. A photodiode has maximum responsivity 0.45A W10.45\,\text{A W}^{-1}. At 650nm650\,\text{nm} its relative spectral response is 0.800.80, and a monochromatic source produces 4.32μA4.32\,\mu\text{A}. The same source power at an unknown wavelength produces 2.70μA2.70\,\mu\text{A}. The unknown wavelength is one of 450nm450\,\text{nm}, 750nm750\,\text{nm} and 900nm900\,\text{nm}. Their relative responses are 0.200.20, 0.700.70 and 0.500.50 respectively. Determine the unknown wavelength.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A particle deposits energy in a scintillator, producing a 25ns25\,\text{ns} optical pulse of constant power 4.0μW4.0\,\mu\text{W}. A reverse-biased photodiode has responsivity 0.48A W10.48\,\text{A W}^{-1} and its readout converts the photocurrent using 270kΩ270\,\text{k}\Omega. Explain how the particle is detected, then calculate the voltage-pulse magnitude and the number of charge carriers in the photocurrent. Use e=1.60×1019Ce=1.60\times10^{-19}\,\text{C}.

    [5 marks]

    Total for this question: 5

  2. A spectrometer sends separate narrow pulses at 520nm520\,\text{nm} and 850nm850\,\text{nm} through an optical filter to the same reverse-biased photodiode. The responsivities are 0.28A W10.28\,\text{A W}^{-1} and 0.56A W10.56\,\text{A W}^{-1}, and the measured photocurrents are 3.36μA3.36\,\mu\text{A} and 8.40μA8.40\,\mu\text{A} respectively. The filter transmits 75%75\% at 520nm520\,\text{nm} and 60%60\% at 850nm850\,\text{nm}. Determine the ratio of the source powers P850/P520P_{850}/P_{520} before the filter.

    [5 marks]

    Total for this question: 5

  3. At a reverse bias of 6.0V6.0\,\text{V}, a photodiode characteristic gives a dark reverse current of 0.20μA0.20\,\mu\text{A} and a total reverse current of 5.60μA5.60\,\mu\text{A} during a 12.0μs12.0\,\mu\text{s} scintillator flash. Determine the charge carried by the flash-induced photocurrent and the number of charge carriers. Use e=1.60×1019Ce=1.60\times10^{-19}\,\text{C}.

    [3 marks]

    Total for this question: 3

  4. A reverse-biased photodiode has maximum responsivity 0.62A W10.62\,\text{A W}^{-1}. Its relative spectral responses are 0.350.35 at 480nm480\,\text{nm} and 0.800.80 at 720nm720\,\text{nm}. Radiation of powers 18μW18\,\mu\text{W} and 7.0μW7.0\,\mu\text{W} at these respective wavelengths reaches the detector simultaneously. Determine the total photocurrent and the magnitude of the potential difference it produces across an 120kΩ120\,\text{k}\Omega resistor.

    [4 marks]

    Total for this question: 4

  5. Each atomic particle entering a scintillator produces a light pulse of energy 3.6×1013J3.6\times10^{-13}\,\text{J} at a wavelength where a reverse-biased photodiode has responsivity 0.44A W10.44\,\text{A W}^{-1}. During one counting interval the integrated photodiode current corresponds to charge 4.752×1010C4.752\times10^{-10}\,\text{C}. Explain the detection chain and determine the number of particles detected. Assume every scintillator pulse reaches the photodiode.

    [4 marks]

    Total for this question: 4

3.13.1.4 · Hall effect sensor

Explanation

  • A Hall effect sensor responds to magnetic field and supplies an electrical output suitable for control or measurement. The internal operating principle is not required.
  • In an attitude monitor, fixed Hall sensors detect the position of magnets attached to a moving or rotating system, allowing orientation to be inferred.
  • In a tachometer, a magnet or magnetic sector passes the sensor once or several times per revolution, producing output pulses.
  • The pulse frequency is therefore the rotation frequency multiplied by the number of pulses per revolution.
  • Examiners expect the application chain—magnetic target, changing sensor output, pulse counting or calibration, then attitude or speed—not a derivation of Hall voltage.
A wheel-mounted magnet passing a Hall sensor produces one pulse per passage.

Worked example

A wheel carries four equally spaced magnets. A Hall sensor records 120120 pulses each second. Calculate the wheel speed.

  1. 1.Four magnets produce four pulses per revolution.
  2. 2.Rotation frequency =120/4=30rev s1=120/4=30\,\text{rev s}^{-1}.
  3. 3.Convert to revolutions per minute: 30×60=1800rev min130\times60=1800\,\text{rev min}^{-1}.

Answer: The wheel speed is 1.8×103rev min11.8\times10^3\,\text{rev min}^{-1}.

Common mistakes

  • Don't equate pulse frequency with rotation frequency when several magnets produce pulses each revolution.
  • Don't explain attitude monitoring without linking magnet position to the Hall-sensor output.
  • Don't give a detailed charge-carrier derivation even though the sensor's operating principle is not required.

Exam tip

In a tachometer calculation, state the number of pulses per revolution before converting pulse rate to rotation rate.

Tier 1 · Easy

  1. The magnetic flux density through a Hall element doubles without changing its current or orientation. State the effect on its Hall voltage.

    [1 mark]

    Total for this question: 1

  2. Explain how a Hall effect sensor and a magnet fixed to a moving control surface can be used to monitor the surface's attitude.

    [2 marks]

    Total for this question: 2

Tier 2 · Standard

  1. A Hall sensor has a zero-field output of 2.500V2.500\,\text{V} and sensitivity 45mV T145\,\text{mV T}^{-1}. Calculate its output for a flux density of 0.18T-0.18\,\text{T}.

    [3 marks]

    Total for this question: 3

  2. A Hall attitude monitor gives 1.800V1.800\,\text{V} at 30.0-30.0^\circ and 3.000V3.000\,\text{V} at +30.0+30.0^\circ, with a linear response between these angles. Calculate the attitude represented by an output of 2.460V2.460\,\text{V}.

    [3 marks]

    Total for this question: 3

  3. A Hall tachometer has seven equally spaced magnets on its rotor. The sensor records 280280 pulses during a 2.50s2.50\,\text{s} interval. Determine the mean rotational speed in rev min1\text{rev min}^{-1} and the mean time interval between successive pulses.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A Hall sensor's output changes by 0.180V0.180\,\text{V} in a calibration field of 60mT60\,\text{mT}. In a speed monitor its peak output change is 0.120V0.120\,\text{V}. Six identical magnets on a wheel each produce one pulse, and the pulse frequency is 180Hz180\,\text{Hz}. Determine the peak magnetic flux density at the sensor and the wheel speed in revolutions per minute. Explain how the field calculation uses the Hall effect.

    [5 marks]

    Total for this question: 5

  2. A turbine shaft rotates at 840rev min1840\,\text{rev min}^{-1}. A Hall tachometer produces one pulse whenever a magnet on the shaft passes the sensor, and its pulse frequency is 210Hz210\,\text{Hz}. Determine the number of equally spaced magnets on the shaft. State one advantage of using more magnets per revolution.

    [3 marks]

    Total for this question: 3

  3. A Hall tachometer rotor has 1212 equally spaced magnet positions, but one magnet has detached. In each repeating pulse pattern there are ten intervals of 2.00ms2.00\,\text{ms} and one interval of 4.00ms4.00\,\text{ms}. A controller measures the mean pulse frequency over many revolutions and divides it by 1212 to obtain the rotation frequency. Determine the true rotor speed and the speed displayed by the controller, both in rev min1\text{rev min}^{-1}. Calculate the percentage error in the displayed speed.

    [4 marks]

    Total for this question: 4

  4. Two Hall sensors monitor the attitude θ\theta of a control surface. Their calibrated outputs are V1=2.10+0.0060θV_1=2.10+0.0060\theta and V2=2.260.0060θV_2=2.26-0.0060\theta, with potentials in volts and θ\theta in degrees. In use, the outputs are 2.244V2.244\,\text{V} and 2.116V2.116\,\text{V}. Determine the attitude. Explain why using the difference V1V2V_1-V_2 rejects a later equal drift added to both sensor outputs.

    [3 marks]

    Total for this question: 3

  5. A Hall tachometer uses nine equally spaced magnets. A rotor is intended to turn steadily at 1200rev min11200\,\text{rev min}^{-1}. Calculate the pulse count expected during a 0.400s0.400\,\text{s} gate. The recorded count is 7676 pulses with an uncertainty of one pulse. Deduce whether the count is consistent with the intended speed. Determine the minimum gate time needed for a one-pulse uncertainty to correspond to no more than 10rev min110\,\text{rev min}^{-1}.

    [4 marks]

    Total for this question: 4

3.13.2.1 · Difference between analogue and digital signals

Explanation

  • An analogue signal varies continuously, whereas digital data uses discrete levels; binary uses two voltage levels representing 0 and 1. Sensors commonly produce analogue data.
  • Analogue-to-digital conversion samples the signal at regular times and quantises each sample to one of 2n2^n levels for an nn-bit code. Higher sampling rate preserves faster time variation; more bits reduce quantisation error and improve amplitude resolution, but both increase data rate.
  • Pulse code modulation transmits the resulting codes as pulses. Digital signals can be regenerated from noisy inputs if levels remain distinguishable, whereas analogue noise accumulates.
  • Digital sampling nevertheless loses information through sampling and quantisation.
  • Only recognition of binary numbers 1–10 is required, not binary arithmetic.
Regular samples of a continuous analogue signal are assigned to discrete quantised levels.

Worked example

Audio is sampled at 12kHz12\,\text{kHz} using 1010 bits per sample. Calculate the bit rate and the number of quantisation levels.

  1. 1.Bit rate =(12×103)(10)=1.20×105bit s1=(12\times10^3)(10)=1.20\times10^5\,\text{bit s}^{-1}.
  2. 2.An nn-bit sample has 2n2^n possible levels.
  3. 3.Number of levels =210=1024=2^{10}=1024.

Answer: The bit rate is 120kbit s1120\,\text{kbit s}^{-1} and there are 10241024 levels.

Common mistakes

  • Don't claim a digital recording exactly reproduces the analogue input and ignore quantisation.
  • Don't say extra bits per sample improve time resolution rather than amplitude resolution.
  • Don't claim noise has no effect on digital transmission even when it moves a pulse across the decision threshold.

Exam tip

A compare question should balance regeneration and noise resistance against sampling loss, quantisation error and increased data rate.

Tier 1 · Easy

  1. State one difference between an analogue signal and a binary digital signal.

    [1 mark]

    Total for this question: 1

  2. Calculate the number of bits contained in three bytes.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. An 88-bit converter divides an input range from 00 to 4.8V4.8\,\text{V} into equal quantisation intervals. Calculate the interval width and the maximum quantisation error.

    [3 marks]

    Total for this question: 3

  2. A regenerator treats received levels above 2.5V2.5\,\text{V} as binary 11 and levels below 2.5V2.5\,\text{V} as binary 00. Four successive received levels are 4.4V4.4\,\text{V}, 0.8V0.8\,\text{V}, 3.2V3.2\,\text{V} and 1.7V1.7\,\text{V}. The first level received is the most significant bit. Determine the recovered decimal number.

    [2 marks]

    Total for this question: 2

  3. A telemetry link can carry 36kbit s136\,\text{kbit s}^{-1} and sends 6.0×1036.0\times10^3 samples each second. Each sample uses the greatest whole number of bits that the link can carry. For a converter range of 00 to 3.2V3.2\,\text{V}, determine the bits per sample, the number of quantisation levels and the quantisation interval.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A sensor signal contains frequencies up to 4.0kHz4.0\,\text{kHz}. It is sampled at 10kHz10\,\text{kHz} with 1414 bits per sample for 45s45\,\text{s}. Explain whether the sampling rate is sufficient, calculate the uncompressed data size in bits and bytes, and discuss one consequence of reducing the resolution to 88 bits.

    [5 marks]

    Total for this question: 5

  2. Explain why regenerators can prevent noise accumulating along a digital temperature-data link but cannot recover information lost when the original analogue sensor signal was sampled and quantised.

    [5 marks]

    Total for this question: 5

  3. An analogue input is either a 1.0kHz1.0\,\text{kHz} cosine signal or a 7.0kHz7.0\,\text{kHz} cosine signal of the same amplitude. Both are offered to a converter that samples at 8.0kHz8.0\,\text{kHz}. State the minimum sampling rate the Nyquist condition requires for each signal, and explain why the 7.0kHz7.0\,\text{kHz} signal sampled at 8.0kHz8.0\,\text{kHz} cannot be distinguished from the 1.0kHz1.0\,\text{kHz} signal sampled at the same rate.

    [3 marks]

    Total for this question: 3

  4. A digital link represents binary 00 by 0.40V0.40\,\text{V} and binary 11 by 4.60V4.60\,\text{V}; its decision level is 2.50V2.50\,\text{V}. In a worst-case model, each cable section moves either received level by 0.15V0.15\,\text{V} towards the decision level. Determine the greatest number of consecutive sections possible without regeneration before either bit can be misidentified. Explain why placing a regenerator after every fourth section prevents this degradation from accumulating through a long link. A level that arrives exactly at the decision level cannot be identified reliably.

    [4 marks]

    Total for this question: 4

  5. A converter must encode a sensor signal spanning 00 to 3.3V3.3\,\text{V} and containing frequencies up to 5.0kHz5.0\,\text{kHz}. The uncompressed link can carry at most 96kbit s196\,\text{kbit s}^{-1}. For this question, an nn-bit converter divides the range into 2n2^n equal quantisation intervals, and the maximum quantisation error is half an interval. The design requires a maximum quantisation error no greater than 4.0mV4.0\,\text{mV} and a sampling rate that meets the Nyquist condition. Determine the minimum whole number of bits per sample and the minimum bit rate that satisfies both requirements. Deduce whether the link can carry the data.

    [4 marks]

    Total for this question: 4

3.13.3.1 · LC resonance filters

Explanation

  • Only parallel LC resonance is required. Energy alternates between the capacitor's electric field and the inductor's magnetic field at resonant frequency f0=1/(2πLC)f_0=1/(2\pi\sqrt{LC}); derivation is not required.
  • The mechanical analogy is a mass–spring oscillator: inductance corresponds to mass and capacitance to the spring property. The required energy or voltage response has a peak at f0f_0; a current-response curve is not required.
  • Bandwidth fBf_B is measured between the two 50% energy points, and quality factor is Q=f0/fBQ=f_0/f_B.
  • A high Q gives a narrow, selective response.
  • Inductance must be in henries and capacitance in farads for frequency in hertz.
The parallel LC energy response peaks at f0f_0 and has bandwidth fBf_B at the 50% energy points.

Worked example

A parallel LC filter has L=1.5mHL=1.5\,\text{mH} and C=4.7nFC=4.7\,\text{nF}. Calculate its resonant frequency.

  1. 1.Convert: L=1.5×103HL=1.5\times10^{-3}\,\text{H} and C=4.7×109FC=4.7\times10^{-9}\,\text{F}.
  2. 2.Use f0=1/(2πLC)f_0=1/(2\pi\sqrt{LC}).
  3. 3.f0=1/[2π(1.5×103)(4.7×109)]f_0=1/[2\pi\sqrt{(1.5\times10^{-3})(4.7\times10^{-9})}].

Answer: f0=6.0×104Hzf_0=6.0\times10^4\,\text{Hz} to two significant figures.

Common mistakes

  • Don't use a series-resonance arrangement even though only parallel resonance is required.
  • Don't read fBf_B as one side of the peak instead of the full separation of the 50% energy points.
  • Don't label inductance as the spring analogy and capacitance as the mass analogy.

Exam tip

On a response graph, mark both 50% energy intersections before calculating fBf_B and then QQ.

Tier 1 · Easy

  1. Calculate the resonant frequency of an LC filter containing L=2.0mHL=2.0\,\text{mH} and C=8.0nFC=8.0\,\text{nF}.

    [2 marks]

    Total for this question: 2

  2. State the electrical quantity corresponding to mass in the mass-spring analogy for an LC circuit.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. A tuned circuit has a response peak at 150kHz150\,\text{kHz}. Its lower and upper half-power frequencies are 143kHz143\,\text{kHz} and 157kHz157\,\text{kHz}. Determine its bandwidth and Q-factor.

    [3 marks]

    Total for this question: 3

  2. A spectrum analyser retunes a parallel LC input filter from 180kHz180\,\text{kHz} to 225kHz225\,\text{kHz} while keeping its inductance constant. Determine the percentage change in capacitance.

    [3 marks]

    Total for this question: 3

  3. A parallel LC filter contains an inductor labelled 1.00mH±2%1.00\,\text{mH}\pm2\% and a capacitor labelled 100pF±5%100\,\text{pF}\pm5\%. Calculate the highest possible resonant frequency allowed by these tolerances.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A receiver uses a 0.75mH0.75\,\text{mH} inductor in an LC filter tuned to 620kHz620\,\text{kHz}. Its measured half-power frequencies are 609kHz609\,\text{kHz} and 631kHz631\,\text{kHz}. Calculate the required capacitance and Q-factor. The wanted transmission occupies 18kHz18\,\text{kHz} centred on resonance; discuss whether the measured bandwidth is suitable.

    [5 marks]

    Total for this question: 5

  2. Explain the energy transfers during free oscillation of an ideal parallel LC circuit whose capacitor is initially charged.

    [4 marks]

    Total for this question: 4

  3. A receiver must tune continuously from 0.55MHz0.55\,\text{MHz} to 1.60MHz1.60\,\text{MHz} using one fixed inductor and a parallel variable capacitor whose range is 20pF20\,\text{pF} to 365pF365\,\text{pF}. Available inductors are 100μH100\,\mu\text{H}, 220μH220\,\mu\text{H} and 270μH270\,\mu\text{H}. Determine the only suitable inductor and the capacitance needed at each end of the tuning range.

    [5 marks]

    Total for this question: 5

  4. An ideal parallel LC circuit contains a 68nF68\,\text{nF} capacitor initially charged to 12V12\,\text{V} and a 4.7mH4.7\,\text{mH} inductor carrying no current. Determine the initial stored energy and the resonant frequency. Calculate the capacitor potential difference at the instant its stored electric-field energy has fallen to one quarter of its initial value.

    [3 marks]

    Total for this question: 3

  5. A parallel tuned circuit contains a fixed 3.3mH3.3\,\text{mH} inductor and is first connected to a 220pF220\,\text{pF} capacitor. Its Q-factor is 8585. The capacitor is then replaced by an 82pF82\,\text{pF} component. Assume the Q factor is unchanged by the retuning. Calculate both resonant frequencies and both bandwidths. Explain the effect of the replacement on tuning and selectivity in absolute frequency terms.

    [4 marks]

    Total for this question: 4

3.13.3.2 · The ideal operational amplifier

Explanation

  • An operational amplifier is a system building block with inverting and non-inverting signal inputs, an output, and positive and negative power-supply connections. An ideal op amp has infinite open-loop gain and infinite input resistance, so no current enters either signal input.
  • For a real open-loop device, Vout=AOL(V+V)V_{\mathrm{out}}=A_{\mathrm{OL}}(V_+-V_-) until the output reaches a supply limit.
  • Used as a comparator, the sign of V+VV_+-V_- drives the output towards the positive or negative saturation level.
  • A tiny differential input can therefore switch a large output.
  • Feedback amplifier rules and virtual earth belong to the following configurations; they should not be assumed for an open-loop comparator.
An operational amplifier has two signal inputs, an output and two power-supply connections.

Worked example

An open-loop op amp has AOL=2.0×105A_{\mathrm{OL}}=2.0\times10^5, V+=1.001VV_+=1.001\,\text{V} and V=1.000VV_-=1.000\,\text{V}. Calculate the unsaturated output.

  1. 1.Find the differential input: V+V=0.001VV_+-V_-=0.001\,\text{V}.
  2. 2.Use Vout=AOL(V+V)V_{\mathrm{out}}=A_{\mathrm{OL}}(V_+-V_-).
  3. 3.Vout=(2.0×105)(0.001)=200VV_{\mathrm{out}}=(2.0\times10^5)(0.001)=200\,\text{V} before applying supply limits.

Answer: The calculated open-loop value is +200V+200\,\text{V}, so a practical device on lower supply rails saturates positively.

Common mistakes

  • Don't reverse the differential input and predict negative output when V+>VV_+>V_-.
  • Don't assume a real op amp can produce the calculated open-loop output beyond its supply rails.
  • Don't apply the virtual-earth rule to an open-loop comparator with no negative feedback.

Exam tip

For a comparator, determine the sign of V+VV_+-V_- first, then state the corresponding saturation direction.

Tier 1 · Easy

  1. State the current entering either input terminal of an ideal operational amplifier.

    [1 mark]

    Total for this question: 1

  2. State the open-loop voltage gain of an ideal operational amplifier.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. An ideal operational amplifier has negative feedback, its non-inverting input is connected to 0V0\,\text{V}, and its output is not saturated. State the potential of the inverting input and explain why that point is called a virtual earth.

    [3 marks]

    Total for this question: 3

  2. An ideal operational amplifier is connected as a comparator with supply potentials of 0V0\,\text{V} and +12V+12\,\text{V}. Its input potentials are V+=2.10VV_+=2.10\,\text{V} and V=2.40VV_-=2.40\,\text{V}. Determine its output potential.

    [2 marks]

    Total for this question: 2

  3. A temperature sensor produces 20.0mV20.0\,\text{mV} per C^\circ\text{C}, and its output is 0V0\,\text{V} at 0C0^\circ\text{C}. It is to operate an ideal op-amp comparator from ±9.0V\pm9.0\,\text{V} supplies. A 1.20V1.20\,\text{V} reference is available. Determine the switching temperature and state the input connections needed for the output to switch from negative to positive saturation as temperature rises.

    [2 marks]

    Total for this question: 2

Tier 3 · Hard

  1. The non-inverting terminal of an ideal op amp is earthed. A +0.80V+0.80\,\text{V} source is connected to the inverting node through 40kΩ40\,\text{k}\Omega, and negative feedback connects the output to that node through 200kΩ200\,\text{k}\Omega. The supply rails are ±6.0V\pm6.0\,\text{V}. Use the ideal-op-amp rules to determine the output voltage and verify that the assumed linear operation is possible.

    [5 marks]

    Total for this question: 5

  2. A real open-loop operational amplifier has gain 2.5×1052.5\times10^5 and supply rails at ±8.0V\pm8.0\,\text{V}. Its inverting input is fixed at 1.800000V1.800000\,\text{V}. Determine the range of non-inverting input potentials for which the calculated output is unsaturated, and the output when V+=1.800020VV_+=1.800020\,\text{V}.

    [5 marks]

    Total for this question: 5

  3. Two ideal op-amp comparators form a temperature-window detector and use ±6.0V\pm6.0\,\text{V} supplies. A sensor produces VS=0.030T+0.20V_{\mathrm S}=0.030T+0.20, where VSV_{\mathrm S} is in volts and TT is in C^\circ\text{C}. Comparator A has V+=VSV_+=V_{\mathrm S} and V=1.40VV_-=1.40\,\text{V}. Comparator B has V+=2.60VV_+=2.60\,\text{V} and V=VSV_-=V_{\mathrm S}. Determine the temperature window in which both outputs are positive. State each comparator output below, inside and above this window. Ignore the outputs exactly at the switching temperatures.

    [4 marks]

    Total for this question: 4

  4. An ideal op amp is used as a comparator on ±7.5V\pm7.5\,\text{V} supplies. During a 12.0s12.0\,\text{s} test, V=1.55VV_-=1.55\,\text{V}. For 0t6.0s0\leq t\leq6.0\,\text{s}, V+=0.50+0.30tV_+=0.50+0.30t; for 6.0t12.0s6.0\leq t\leq12.0\,\text{s}, V+=4.100.30tV_+=4.10-0.30t, where potentials are in volts and tt is in seconds. Determine both switching times, describe the output over the test and calculate the fraction of the test spent at positive saturation.

    [4 marks]

    Total for this question: 4

  5. A sensor connected to the non-inverting input of an ideal comparator has nominal output VS=0.90+0.055TV_{\mathrm S}=0.90+0.055T, with TT measured in C^\circ\text{C} and VSV_{\mathrm S} measured in volts. At any temperature its actual output may differ from the nominal value by ±0.080V\pm0.080\,\text{V}. The inverting input is held at 2.55V2.55\,\text{V} and the supply rails are ±10.0V\pm10.0\,\text{V}. Determine the temperature range that guarantees negative saturation, the range that guarantees positive saturation and the interval in which either output is possible. State why connecting the sensor to an ideal input does not alter its calibration.

    [5 marks]

    Total for this question: 5

3.13.4.1 · Operational amplifier: inverting amplifier configuration

Explanation

  • In an inverting amplifier, the non-inverting input is earthed and negative feedback holds the inverting input at approximately 0V0\,\text{V}. This is a virtual earth: it has earth potential but is not directly connected to earth.
  • Infinite input resistance means no current enters the op amp, so the current through RinR_{\mathrm{in}} must flow through feedback resistor RfR_f.
  • Kirchhoff analysis gives Vout/Vin=Rf/RinV_{\mathrm{out}}/V_{\mathrm{in}}=-R_f/R_{\mathrm{in}}.
  • The minus sign means the output is inverted, or 180180^\circ out of phase.
  • The derivation, virtual-earth reasoning and gain calculations are all required; real outputs may clip at supply limits.
Inverting amplifier with an earthed non-inverting input and feedback to the virtual-earth node.

Worked example

An inverting amplifier has Rin=12kΩR_{\mathrm{in}}=12\,\text{k}\Omega, Rf=72kΩR_f=72\,\text{k}\Omega and Vin=0.35VV_{\mathrm{in}}=0.35\,\text{V}. Calculate the output.

  1. 1.Use Vout/Vin=Rf/RinV_{\mathrm{out}}/V_{\mathrm{in}}=-R_f/R_{\mathrm{in}}.
  2. 2.Gain =72/12=6.0=-72/12=-6.0.
  3. 3.Vout=(6.0)(0.35)=2.10VV_{\mathrm{out}}=(-6.0)(0.35)=-2.10\,\text{V}.

Answer: Vout=2.1VV_{\mathrm{out}}=-2.1\,\text{V}.

Common mistakes

  • Don't call the virtual-earth node a direct physical connection to earth.
  • Don't allow current to enter the ideal inverting input instead of directing it through RfR_f.
  • Don't drop the minus sign and miss the phase reversal.

Exam tip

For a derivation, state virtual earth and zero input current before applying Kirchhoff's current law.

Tier 1 · Easy

  1. An inverting amplifier has Rin=10kΩR_{\text{in}}=10\,\text{k}\Omega, Rf=47kΩR_f=47\,\text{k}\Omega and Vin=+0.60VV_{\text{in}}=+0.60\,\text{V}. Calculate VoutV_{\text{out}}.

    [2 marks]

    Total for this question: 2

  2. An inverting amplifier uses a 24kΩ24\,\text{k}\Omega input resistor and a 180kΩ180\,\text{k}\Omega feedback resistor. Calculate its closed-loop voltage gain.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. The non-inverting input of an ideal operational amplifier is earthed. Its input and feedback resistors are 12kΩ12\,\text{k}\Omega and 68kΩ68\,\text{k}\Omega. Derive the closed-loop gain from currents at the inverting input, then determine the output for Vin=0.45VV_{\text{in}}=-0.45\,\text{V}.

    [3 marks]

    Total for this question: 3

  2. An inverting amplifier must convert an input of 0.28V-0.28\,\text{V} into an output of +2.52V+2.52\,\text{V}. Its input resistor is 18kΩ18\,\text{k}\Omega. Determine the required feedback resistance.

    [2 marks]

    Total for this question: 2

  3. An inverting amplifier has voltage gain 10.0-10.0 and must produce an output peak of 4.00V4.00\,\text{V}. The output drives no external load, so its current is only the current in the feedback resistor. The maximum permitted output current is 0.500mA0.500\,\text{mA}. Determine the minimum input resistance.

    [2 marks]

    Total for this question: 2

Tier 3 · Hard

  1. An inverting amplifier has Rin=15kΩR_{\text{in}}=15\,\text{k}\Omega and Rf=120kΩR_f=120\,\text{k}\Omega. Its output saturates at ±8.0V\pm8.0\,\text{V}. A sinusoidal input has peak voltage 1.4V1.4\,\text{V}. Determine the ideal output peak, describe the actual output, and calculate the largest input peak that would avoid clipping.

    [5 marks]

    Total for this question: 5

  2. A sensor of emf 0.600V0.600\,\text{V} and internal resistance 4.00kΩ4.00\,\text{k}\Omega drives an inverting amplifier through a 20.0kΩ20.0\,\text{k}\Omega input resistor. The feedback resistance is 120kΩ120\,\text{k}\Omega. Determine the output potential, accounting for source loading.

    [3 marks]

    Total for this question: 3

  3. An inverting amplifier must accept an input peak of 0.420V0.420\,\text{V} without its output exceeding 4.50V4.50\,\text{V}. The nominal input resistor is 20.0kΩ20.0\,\text{k}\Omega and available feedback resistors are 180kΩ180\,\text{k}\Omega and 220kΩ220\,\text{k}\Omega. Every resistor may differ from its nominal value by ±5%\pm5\%. Determine the feedback resistor that gives the greatest gain while guaranteeing no clipping.

    [4 marks]

    Total for this question: 4

  4. An inverting amplifier uses Rin=32.0kΩR_{\text{in}}=32.0\,\text{k}\Omega. Its feedback path contains resistor RAR_A and a switch that can add resistor RBR_B in series with RAR_A. The required closed-loop gains are 3.25-3.25 with the switch open and 7.75-7.75 with it closed. Determine RAR_A and RBR_B. For an input peak of 0.360V0.360\,\text{V}, calculate both output peaks and the peak current in the feedback path for each setting.

    [5 marks]

    Total for this question: 5

  5. An inverting amplifier has Rin=32.0kΩR_{\text{in}}=32.0\,\text{k}\Omega, Rf=192kΩR_f=192\,\text{k}\Omega and symmetrical output limits of ±5.70V\pm5.70\,\text{V}. For a constant input potential, the feedback resistor must dissipate no more than 0.180mW0.180\,\text{mW}. Determine the greatest permitted magnitude of input potential and state which restriction sets it.

    [4 marks]

    Total for this question: 4

3.13.4.2 · Operational amplifier: non-inverting amplifier configuration

Explanation

  • In a non-inverting amplifier, the signal is applied to the non-inverting input, so output and input have the same polarity. Negative feedback makes the two input potentials approximately equal while the output remains unsaturated.
  • The resistor divider between output and earth sets the inverting-input potential, leading to Vout/Vin=1+Rf/R1V_{\mathrm{out}}/V_{\mathrm{in}}=1+R_f/R_1. Derivation is not required by the specification, but calculations using the formula are.
  • The gain is positive and cannot be less than one.
  • Infinite ideal input resistance means the signal source supplies negligible current.
  • A calculated output must still be checked against the real device's supply-limited output range.
Non-inverting amplifier with a feedback divider from output to the inverting input.

Worked example

A non-inverting amplifier has Rf=36kΩR_f=36\,\text{k}\Omega, R1=9.0kΩR_1=9.0\,\text{k}\Omega and input 0.40V0.40\,\text{V}. Calculate the output.

  1. 1.Use gain =1+Rf/R1=1+R_f/R_1.
  2. 2.Gain =1+36/9.0=5.0=1+36/9.0=5.0.
  3. 3.Vout=(5.0)(0.40)=2.0VV_{\mathrm{out}}=(5.0)(0.40)=2.0\,\text{V}.

Answer: Vout=+2.0VV_{\mathrm{out}}=+2.0\,\text{V}.

Common mistakes

  • Don't omit the 1 and use gain Rf/R1R_f/R_1.
  • Don't add a minus sign even though the signal enters the non-inverting input.
  • Don't report an output beyond the supply rails without identifying saturation.

Exam tip

The configuration name predicts the sign: a non-inverting amplifier has positive closed-loop gain.

Tier 1 · Easy

  1. A non-inverting amplifier has R1=10kΩR_1=10\,\text{k}\Omega, Rf=39kΩR_f=39\,\text{k}\Omega and input voltage 0.80V0.80\,\text{V}. Calculate its output voltage.

    [2 marks]

    Total for this question: 2

  2. A non-inverting amplifier has R1=15kΩR_1=15\,\text{k}\Omega and Rf=105kΩR_f=105\,\text{k}\Omega. Calculate its voltage gain.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. In a non-inverting amplifier, R1=8.2kΩR_1=8.2\,\text{k}\Omega joins the inverting input to earth and Rf=33kΩR_f=33\,\text{k}\Omega joins the output to that input. Use the feedback-divider potential to derive the gain and calculate the output when Vin=0.50VV_{\text{in}}=0.50\,\text{V}.

    [4 marks]

    Total for this question: 4

  2. A pressure sensor supplies 0.25V0.25\,\text{V} to a non-inverting amplifier and requires an output of 2.00V2.00\,\text{V}. The resistor from the inverting input to earth is 12kΩ12\,\text{k}\Omega. Determine the feedback resistance.

    [2 marks]

    Total for this question: 2

  3. A non-inverting amplifier has R1=18.0kΩR_1=18.0\,\text{k}\Omega between its inverting input and earth and Rf=72.0kΩR_f=72.0\,\text{k}\Omega in the feedback path. Its output is +7.50V+7.50\,\text{V}. Determine the input potential and the current in the feedback divider.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A non-inverting amplifier uses R1=18kΩR_1=18\,\text{k}\Omega and Rf=82kΩR_f=82\,\text{k}\Omega. Its output saturates at ±11.5V\pm11.5\,\text{V}. Calculate the maximum peak-to-peak sinusoidal input that can be amplified without clipping, and state the corresponding output peak-to-peak voltage.

    [5 marks]

    Total for this question: 5

  2. A non-inverting amplifier saturates at ±13.0V\pm13.0\,\text{V}. Its input can have a peak potential of 0.900V0.900\,\text{V} and the resistor from the inverting input to earth is 10.0kΩ10.0\,\text{k}\Omega. Available feedback resistors are 120kΩ120\,\text{k}\Omega, 140kΩ140\,\text{k}\Omega and 150kΩ150\,\text{k}\Omega. Determine the greatest available resistance that avoids saturation.

    [3 marks]

    Total for this question: 3

  3. A non-inverting amplifier is designed for voltage gain 7.507.50. When its output is 9.00V9.00\,\text{V}, the intended current through the feedback divider is 50.0μA50.0\,\mu\text{A}. Determine the ideal values of the resistance R1R_1 from the inverting input to earth and the feedback resistance RfR_f. Only 150kΩ150\,\text{k}\Omega and 160kΩ160\,\text{k}\Omega are available for RfR_f, while the ideal R1R_1 is available. Select the closer feedback resistance and calculate the percentage error in gain.

    [4 marks]

    Total for this question: 4

  4. Two identical non-inverting amplifiers are connected in cascade. Their combined voltage gain must be 64.064.0, and each has R1=16.0kΩR_1=16.0\,\text{k}\Omega from its inverting input to earth. Determine the feedback resistance for each stage. For an input peak of 75.0mV75.0\,\text{mV}, calculate the intermediate and ideal final output peaks, then state the actual final peak if both amplifiers are limited to ±4.50V\pm4.50\,\text{V}.

    [5 marks]

    Total for this question: 5

  5. A non-inverting amplifier has R1=14.0kΩR_1=14.0\,\text{k}\Omega and Rf=91.0kΩR_f=91.0\,\text{k}\Omega. A sinusoidal input has peak potential 0.720V0.720\,\text{V}. The output can approach no closer than 0.850V0.850\,\text{V} to either supply rail. Determine the smallest magnitude of the symmetrical supply rails that permits an undistorted output.

    [3 marks]

    Total for this question: 3

3.13.4.3 · Operational amplifier: summing amplifier configuration

Explanation

  • A summing amplifier uses several input resistors feeding one virtual-earth inverting node. Because no current enters the ideal input, the algebraic sum of input currents flows through the feedback resistor.
  • The required result is Vout=Rf(V1/R1+V2/R2+V3/R3+)V_{\mathrm{out}}=-R_f(V_1/R_1+V_2/R_2+V_3/R_3+\ldots); derivation is not required.
  • Each resistor ratio sets that input's weighting, and positive and negative voltages must retain their signs.
  • The related difference-amplifier configuration produces Vout=(V+V)Rf/R1V_{\mathrm{out}}=(V_+-V_-)R_f/R_1 for the specified matched ratios, also without derivation.
  • Both configurations remain limited by output saturation, so the calculated ideal value may be clipped.
Three weighted inputs feed the virtual-earth summing node of an inverting summing amplifier.

Worked example

A summing amplifier has Rf=40kΩR_f=40\,\text{k}\Omega. Inputs 0.60V0.60\,\text{V} and 0.20V-0.20\,\text{V} use 20kΩ20\,\text{k}\Omega and 10kΩ10\,\text{k}\Omega. Calculate the output.

  1. 1.Use Vout=Rf(V1/R1+V2/R2)V_{\mathrm{out}}=-R_f(V_1/R_1+V_2/R_2).
  2. 2.The signed current terms are 0.60/20=0.0300.60/20=0.030 and 0.20/10=0.020-0.20/10=-0.020.
  3. 3.Vout=40(0.010)=0.40VV_{\mathrm{out}}=-40(0.010)=-0.40\,\text{V}.

Answer: Vout=0.40VV_{\mathrm{out}}=-0.40\,\text{V}.

Common mistakes

  • Don't add input voltage magnitudes and lose cancellation from a negative input.
  • Don't use one common input resistance in the calculation when the inputs have different RiR_i values.
  • Don't reverse the difference-amplifier subtraction and change the output sign.

Exam tip

For a weighted sum, calculate each signed Vi/RiV_i/R_i term separately before multiplying by Rf-R_f.

Tier 1 · Easy

  1. A summing amplifier has Rf=20kΩR_f=20\,\text{k}\Omega. Two inputs of 0.30V0.30\,\text{V} and 0.50V0.50\,\text{V} are each connected through 10kΩ10\,\text{k}\Omega. Calculate the output voltage.

    [2 marks]

    Total for this question: 2

  2. A difference amplifier has matched resistor ratios Rf/R1=6.0R_f/R_1=6.0. The source signal V1=0.25VV_1=0.25\,\text{V} feeds the inverting input and V2=0.70VV_2=0.70\,\text{V} feeds the non-inverting input. Use Vout=(V2V1)Rf/R1V_{\text{out}}=(V_2-V_1)R_f/R_1 to calculate the output potential.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. A summing amplifier has Rf=60kΩR_f=60\,\text{k}\Omega. Inputs +0.90V+0.90\,\text{V}, 1.20V-1.20\,\text{V} and +0.50V+0.50\,\text{V} are connected through 15kΩ15\,\text{k}\Omega, 30kΩ30\,\text{k}\Omega and 20kΩ20\,\text{k}\Omega, respectively. Determine VoutV_{\text{out}}.

    [3 marks]

    Total for this question: 3

  2. A summing amplifier has Rf=90kΩR_f=90\,\text{k}\Omega. One input is +0.40V+0.40\,\text{V} through 30kΩ30\,\text{k}\Omega and a second input V2V_2 is connected through 45kΩ45\,\text{k}\Omega. The output is 0.60V-0.60\,\text{V}. Determine V2V_2.

    [2 marks]

    Total for this question: 2

  3. A three-input summing amplifier has Rf=40kΩR_f=40\,\text{k}\Omega, with V1V_1 connected through 10kΩ10\,\text{k}\Omega, V2V_2 through 20kΩ20\,\text{k}\Omega and V3V_3 through 40kΩ40\,\text{k}\Omega. Each input is switched independently between 0V0\,\text{V} and 1.0V-1.0\,\text{V}. Determine the three input settings that produce Vout=+5.0VV_{\text{out}}=+5.0\,\text{V}.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A summing amplifier has Rf=100kΩR_f=100\,\text{k}\Omega and saturates at 10.5V-10.5\,\text{V} on negative output. Inputs +1.20V+1.20\,\text{V}, 0.60V-0.60\,\text{V} and +1.50V+1.50\,\text{V} pass through 12kΩ12\,\text{k}\Omega, 30kΩ30\,\text{k}\Omega and 20kΩ20\,\text{k}\Omega. Calculate the ideal output, state the actual output, and find the value to which the third input must be reduced to put the amplifier just at the saturation boundary.

    [6 marks]

    Total for this question: 6

  2. A two-channel audio summing amplifier has Rf=120kΩR_f=120\,\text{k}\Omega. With only V1=+0.50VV_1=+0.50\,\text{V} applied, the output is 2.00V-2.00\,\text{V}. When V2=0.20VV_2=-0.20\,\text{V} is also applied, the output becomes 0.80V-0.80\,\text{V}. Determine the two input resistances.

    [3 marks]

    Total for this question: 3

  3. A two-sensor summing amplifier uses a feedback resistance of 180kΩ180\,\text{k}\Omega. Sensor AA ranges from 00 to +0.600V+0.600\,\text{V} and sensor BB ranges from 00 to +1.20V+1.20\,\text{V}. At their maximum inputs, the contribution from sensor AA to the magnitude of the output must be twice the contribution from sensor BB. The combined output must then be just at the negative saturation boundary of 9.00V-9.00\,\text{V}. Determine the two input resistances RAR_A and RBR_B.

    [4 marks]

    Total for this question: 4

  4. A summing amplifier is to be used as a four-bit digital-to-analogue converter. A logic 11 supplies +0.800V+0.800\,\text{V} and logic 00 supplies 0V0\,\text{V}. The feedback resistance is 160kΩ160\,\text{k}\Omega, and the least significant bit must change the ideal output by 0.400V0.400\,\text{V}. Design the four input resistances to give binary weighting, stating them from most significant bit to least significant bit. The negative output limit is 4.50V-4.50\,\text{V}; identify the first input code, in ascending binary order, that saturates the amplifier.

    [5 marks]

    Total for this question: 5

  5. A summing amplifier must convert a sensor potential that ranges from +0.200V+0.200\,\text{V} to +1.00V+1.00\,\text{V} into an output that changes linearly from +6.00V+6.00\,\text{V} to 6.00V-6.00\,\text{V}. A constant reference input of 0.750V-0.750\,\text{V} is available and Rf=180kΩR_f=180\,\text{k}\Omega. Determine the input resistance for the sensor and the input resistance for the reference.

    [5 marks]

    Total for this question: 5

3.13.4.4 · Real operational amplifiers

Explanation

  • Real operational amplifiers depart from the ideal model: open-loop gain and input resistance are finite, output voltage and current are limited, and response depends on frequency. A frequency-response curve shows gain approximately constant at low frequency, then falling above a corner frequency.
  • For a given device, gain multiplied by bandwidth is approximately constant, so increasing closed-loop gain reduces usable bandwidth.
  • Signals above that bandwidth are attenuated and phase shifted.
  • The specification requires limitations, the response curve and the gain–bandwidth relationship; a detailed slew-rate treatment is not required.
  • Examiners may ask for a bandwidth calculation or for an explanation of why a high-gain circuit cannot amplify high-frequency signals faithfully.
A real op amp's gain falls above its bandwidth; gain multiplied by bandwidth is approximately constant.

Worked example

An op amp has gain–bandwidth product 2.4MHz2.4\,\text{MHz}. Calculate the bandwidth at closed-loop gain 8080.

  1. 1.Use gain multiplied by bandwidth equals the device constant.
  2. 2.fB=(2.4×106)/80f_B=(2.4\times10^6)/80.
  3. 3.fB=3.0×104Hzf_B=3.0\times10^4\,\text{Hz}.

Answer: The bandwidth is 30kHz30\,\text{kHz}.

Common mistakes

  • Don't assume a real op amp retains its low-frequency gain at every frequency.
  • Don't multiply the gain–bandwidth product by gain instead of dividing by gain.
  • Don't attribute all real-device error to finite input resistance and ignore output limits and frequency response.

Exam tip

On a response graph, read bandwidth at the end of the flat-gain region and link greater gain to smaller bandwidth.

Tier 1 · Easy

  1. An operational amplifier has a gain--bandwidth product of 3.0MHz3.0\,\text{MHz}. Calculate its bandwidth when its closed-loop voltage gain is 3030.

    [2 marks]

    Total for this question: 2

  2. State two limitations of a real operational amplifier compared with an ideal operational amplifier.

    [2 marks]

    Total for this question: 2

Tier 2 · Standard

  1. A real operational amplifier has slew rate 1.5Vμs11.5\,\text{V}\,\mu\text{s}^{-1}. Determine whether it can produce an undistorted sine wave of frequency 80kHz80\,\text{kHz} and peak output 4.0V4.0\,\text{V}. Also calculate the greatest frequency allowed by the slew rate at this peak voltage.

    [4 marks]

    Total for this question: 4

  2. A real operational amplifier has a gain--bandwidth product of 1.8MHz1.8\,\text{MHz}. Calculate the greatest closed-loop gain usable at 45kHz45\,\text{kHz} and discuss whether a closed-loop gain of 6060 is suitable at this frequency.

    [2 marks]

    Total for this question: 2

  3. A source of emf 0.800V0.800\,\text{V} and internal resistance 200kΩ200\,\text{k}\Omega drives a real operational amplifier whose input resistance at its input terminals is 800kΩ800\,\text{k}\Omega. Treat these resistances as a potential divider. The closed-loop gain is 10.010.0 and the output is within its limits. Determine the actual output and the percentage by which it is below the ideal output for infinite input resistance.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. An operational amplifier has gain--bandwidth product 4.0MHz4.0\,\text{MHz} and slew rate 0.80Vμs10.80\,\text{V}\,\mu\text{s}^{-1}. It is used at closed-loop gain 2525 to produce a 60kHz60\,\text{kHz} sine wave whose ideal output peak is 3.0V3.0\,\text{V}. Test both frequency limitations and calculate the largest undistorted output peak at this frequency.

    [6 marks]

    Total for this question: 6

  2. A sensor signal has peak potential 0.180V0.180\,\text{V} and frequency 100kHz100\,\text{kHz}. It requires closed-loop gain 4040. Op amp A has gain--bandwidth product 2.4MHz2.4\,\text{MHz} and op amp B has gain--bandwidth product 6.0MHz6.0\,\text{MHz}; both have maximum output peak 8.0V8.0\,\text{V}. Discuss which op amp is suitable.

    [3 marks]

    Total for this question: 3

  3. A real operational amplifier has gain--bandwidth product 3.60MHz3.60\,\text{MHz}, maximum output peak 9.00V9.00\,\text{V} and maximum output current 8.00mA8.00\,\text{mA}. It drives a 470Ω470\,\Omega load with a 0.150V0.150\,\text{V} peak input at 80.0kHz80.0\,\text{kHz}. Ignore the current in the feedback network. Its closed-loop gain can be set to any positive whole number. Determine the greatest gain for which none of the three limits is exceeded.

    [4 marks]

    Total for this question: 4

  4. A technician measures the frequency response of a real operational amplifier at three closed-loop gains. The measured gain and bandwidth pairs are 25.025.0 with 160kHz160\,\text{kHz}, 80.080.0 with 50.0kHz50.0\,\text{kHz}, and 125125 with 28.0kHz28.0\,\text{kHz}. Assuming a constant gain--bandwidth product, evaluate the measurements, identify the anomalous pair and predict the bandwidth that should have been recorded for that gain.

    [4 marks]

    Total for this question: 4

  5. Identical op amps each have gain--bandwidth product 2.10MHz2.10\,\text{MHz}. They are to be cascaded to provide total voltage gain 10001000 for a signal containing frequencies up to 75.0kHz75.0\,\text{kHz}. Determine the minimum number of identical stages required. Calculate the gain and bandwidth of each stage in that arrangement and, if each stage is non-inverting with R1=15.0kΩR_1=15.0\,\text{k}\Omega, determine its feedback resistance.

    [5 marks]

    Total for this question: 5

3.13.5.1 · Combinational logic

Explanation

  • A combinational circuit's output depends only on its present inputs. Boolean notation links expressions, truth tables and gate networks: A\overline A means NOT A, ABA\cdot B means A AND B, and A+BA+B means A OR B.
  • Students must identify and use AND, NAND, OR, NOR, NOT and EOR gates in combinations. EOR outputs 1 only when its two inputs differ.
  • To construct a circuit from a truth table, form Boolean terms for rows with output 1 and combine them, or simplify an equivalent expression.
  • To deduce a truth table, evaluate intermediate gate outputs systematically.
  • Internal gate circuitry is not required.

Worked example

Write a Boolean expression for an output that is 1 only when A=1A=1 and B=0B=0, then name the required gates.

  1. 1.Invert B to obtain B\overline B.
  2. 2.AND A with the inverted input.
  3. 3.The output is Y=ABY=A\cdot\overline B.

Answer: Use a NOT gate on B followed by an AND gate: Y=ABY=A\cdot\overline B.

Common mistakes

  • Don't treat Boolean plus as ordinary arithmetic addition instead of OR.
  • Don't state that EOR outputs 1 when both inputs are 1.
  • Don't build a circuit for rows where the truth-table output is 0 rather than the required output-1 rows.

Exam tip

When deducing a multi-gate truth table, add one intermediate-output column for each gate.

Tier 1 · Easy

  1. For the Boolean function Y=ABY=A\cdot\overline{B}, state the four values of YY for inputs AB=00,01,10,11AB=00,01,10,11 in that order.

    [2 marks]

    Total for this question: 2

  2. Identify the single gate equivalent to the Boolean expression Y=A+BY=\overline{A+B}.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. A two-input circuit must output 11 for AB=01AB=01 and AB=10AB=10, but 00 for AB=00AB=00 and AB=11AB=11. Identify the single gate that performs this function and write an equivalent Boolean expression using only AND, OR and NOT.

    [3 marks]

    Total for this question: 3

  2. A three-input logic system has outputs 0,0,0,1,0,1,0,10,0,0,1,0,1,0,1 when ABCABC runs in binary order from 000000 to 111111. Deduce a minimal Boolean expression and state the two-gate implementation.

    [2 marks]

    Total for this question: 2

  3. A fault indicator has inputs AA, BB and CC. Its output is 11 only when exactly one input is 11. Deduce a Boolean expression using only AND, OR and NOT, and state a gate sequence that implements it.

    [2 marks]

    Total for this question: 2

Tier 3 · Hard

  1. A control output is Y=(A+B)CY=(A+B)\cdot\overline{C}. Construct its eight-row truth-table output with ABCABC in ascending binary order from 000000 to 111111, then describe a NAND-only implementation.

    [6 marks]

    Total for this question: 6

  2. A circuit must implement Q=AB+ACQ=AB+AC using NAND gates only. Write an equivalent NAND-only expression and state the minimum number of NAND gates required.

    [2 marks]

    Total for this question: 2

  3. A logic chain has X=A EORBX=A\operatorname{\ EOR}B and Y=X EORCY=X\operatorname{\ EOR}C. State the eight output values, in order from input 000 to 111, of YY for the input rows from ABC=000ABC=000 to ABC=111ABC=111 in standard binary order. Deduce a single expression for YY in terms of AA, BB and CC.

    [3 marks]

    Total for this question: 3

  4. Two unsigned two-bit numbers are X=2A+BX=2A+B and Z=2C+DZ=2C+D, where AA and CC are the most significant bits. An output YY must be 11 only when X>ZX>Z. Deduce a Boolean expression for YY using AND, OR, NOT and EOR gates.

    [3 marks]

    Total for this question: 3

  5. A four-way data selector has data inputs D0,D1,D2,D3D_0,D_1,D_2,D_3 and selector inputs S1,S0S_1,S_0. Its output equals D0,D1,D2D_0,D_1,D_2 or D3D_3 when S1S0S_1S_0 is 00,01,1000,01,10 or 1111, respectively. Write a Boolean expression using only AND, OR and NOT that implements the selector. The data inputs are then fixed at D0=0D_0=0, D1=1D_1=1, D2=1D_2=1 and D3=0D_3=0. Deduce the single gate that can replace the complete selector for this setting.

    [4 marks]

    Total for this question: 4

3.13.5.2 · Sequential logic

Explanation

  • Sequential logic has memory, so outputs depend on previous state as well as present inputs. Required counting circuits are binary, BCD and Johnson counters.
  • Clock pulses trigger state changes; reset establishes a known starting state, and an up/down input selects counting direction where provided. A binary counter progresses through binary outputs, while BCD uses the ten states for decimal 0–9.
  • A Johnson counter circulates a pattern through its outputs.
  • A modulo-nn counter has nn stable states: logic detects the next unwanted state and drives reset, returning the count to zero.
  • Gates are building blocks; their internal circuitry is not required.
A modulo counter uses output-decoding logic to drive the reset input at the chosen count.

Worked example

A three-bit up-counter is made modulo 6. State the stable sequence and the state decoded to reset it.

  1. 1.Modulo 6 needs six stable states representing decimal 0 to 5.
  2. 2.The sequence is 000,001,010,011,100,101000,001,010,011,100,101.
  3. 3.The next state is decimal 6, binary 110110, so logic decodes 110110 to reset.

Answer: The counter cycles from 000000 to 101101 and resets when 110110 is detected.

Common mistakes

  • Don't call a three-bit binary counter modulo 3 rather than recognising its eight possible states.
  • Don't include the decoded reset state as a stable output of the modulo counter.
  • Don't confuse BCD's ten decimal-digit states with a full four-bit binary count of sixteen states.

Exam tip

For modulo-nn, list states 0 to n1n-1, then decode state nn to operate reset.

Tier 1 · Easy

  1. A three-bit up-counter is reset to 000000. State its output after five clock pulses, writing the most significant bit first.

    [2 marks]

    Total for this question: 2

  2. A BCD up-counter initially displays binary 01110111. State its output after six clock pulses.

    [2 marks]

    Total for this question: 2

Tier 2 · Standard

  1. State the number of distinct states of a four-stage Johnson counter and of a four-bit BCD counter. A BCD counter receives a 1.20kHz1.20\,\text{kHz} clock; determine the rate at which it completes full count cycles.

    [4 marks]

    Total for this question: 4

  2. Three successive outputs of a four-bit binary counter are 01010101, 01000100 and 00110011. State the setting of its up/down control input and predict the next output.

    [2 marks]

    Total for this question: 2

  3. A four-bit binary up/down counter starts at 11011101. It counts up for seven clock pulses and then counts down for ten pulses, wrapping between 11111111 and 00000000 when necessary. Determine its final output.

    [2 marks]

    Total for this question: 2

Tier 3 · Hard

  1. A three-bit up-counter is converted to a modulo-66 counter by decoding one state to reset it. Identify the decoded reset state, list the stable count sequence, determine the output after 5353 pulses from reset, and calculate the cycle rate for a 24kHz24\,\text{kHz} clock.

    [6 marks]

    Total for this question: 6

  2. A four-stage Johnson counter starts at Q3Q2Q1Q0=0000Q_3Q_2Q_1Q_0=0000. On each pulse, Q0\overline{Q_0} enters Q3Q_3 and every other bit shifts one place towards Q0Q_0. Determine the state after 3737 pulses.

    [4 marks]

    Total for this question: 4

  3. A five-stage Johnson counter starts at Q4Q3Q2Q1Q0=00000Q_4Q_3Q_2Q_1Q_0=00000. At every clock edge the value NOT Q0Q_0 is loaded into Q4Q_4, while the stored values advance towards Q0Q_0. An output is formed by Y=Q4 EORQ2Y=Q_4\operatorname{\ EOR}Q_2. For a 30.0kHz30.0\,\text{kHz} clock, determine the repeating state sequence, the corresponding repeating pattern of YY and the frequency of YY.

    [3 marks]

    Total for this question: 3

  4. A four-bit binary up-counter starts at 00000000 and is driven by a 1.60MHz1.60\,\text{MHz} clock. The outputs Q0Q_0 to Q3Q_3 have Q0Q_0 as the least significant bit. Determine the frequencies at Q0Q_0 and Q3Q_3, and state the complete counter output after 20272027 clock pulses.

    [4 marks]

    Total for this question: 4

  5. Two cascaded BCD down-counters display a number from 0000 to 9999. The units counter clocks the tens counter once whenever it changes from 00 to 99. Starting from 4242, the system receives 137137 clock pulses. Determine the number of clock pulses received by the tens counter, the final two-digit display and the four-bit BCD output of each counter. The input clock frequency is 2.50kHz2.50\,\text{kHz}; also calculate the rate at which the complete two-digit count pattern repeats.

    [5 marks]

    Total for this question: 5

3.13.5.3 · Astables

Explanation

  • An astable has no stable state and oscillates continuously, providing a clock pulse train. Pulse rate is frequency, with f=1/Tf=1/T.
  • Pulse width is the duration of one high or low level as stated. Duty cycle is the high-time fraction of a period, while mark-to-space ratio compares high time with low time.
  • An external RC network controls the charging and discharging times, so changing resistance or capacitance changes running frequency.
  • A larger RC time constant usually gives a longer period and lower frequency.
  • No particular circuit or device, such as a 555 timer, is required; questions must supply any device-specific timing relationship.
An astable clock waveform showing pulse width and period.

Worked example

An astable output is high for 0.80ms0.80\,\text{ms} and low for 1.20ms1.20\,\text{ms}. Calculate frequency, duty cycle and mark-to-space ratio.

  1. 1.T=0.80+1.20=2.00msT=0.80+1.20=2.00\,\text{ms}, so f=1/T=500Hzf=1/T=500\,\text{Hz}.
  2. 2.Duty cycle =(0.80/2.00)×100=40%=(0.80/2.00)\times100=40\%.
  3. 3.Mark-to-space ratio =0.80:1.20=2:3=0.80:1.20=2:3.

Answer: f=500Hzf=500\,\text{Hz}, duty cycle 40%40\%, mark-to-space ratio 2:32:3.

Common mistakes

  • Don't use only the high pulse width as the complete period.
  • Don't calculate duty cycle using low time divided by period.
  • Don't state that increasing the external RC time constant increases running frequency.

Exam tip

Mark the high time and low time on the waveform before finding period, duty cycle or mark-to-space ratio.

Tier 1 · Easy

  1. An astable produces a pulse train of period 2.5ms2.5\,\text{ms} with a high pulse lasting 1.0ms1.0\,\text{ms}. Calculate the frequency and duty cycle.

    [2 marks]

    Total for this question: 2

  2. An astable runs at 2.0kHz2.0\,\text{kHz} and its output remains high for 0.18ms0.18\,\text{ms} in each cycle. Calculate the low time.

    [2 marks]

    Total for this question: 2

Tier 2 · Standard

  1. In an astable, a capacitor charges through 47kΩ47\,\text{k}\Omega from VS/3V_S/3 to 2VS/32V_S/3 and then discharges through the same resistance over the reverse threshold interval. The capacitance is 22nF22\,\text{nF}. Using exponential charging, determine the period and frequency.

    [4 marks]

    Total for this question: 4

  2. For one astable circuit the supplied timing relation is T=1.4RCT=1.4RC. Determine the capacitance needed for a frequency of 250Hz250\,\text{Hz} when R=68kΩR=68\,\text{k}\Omega.

    [2 marks]

    Total for this question: 2

  3. An astable obeys the supplied relation T=1.4RCT=1.4RC. At 20C20\,{}^\circ\text{C}, R=56.0kΩR=56.0\,\text{k}\Omega and C=33.0nFC=33.0\,\text{nF}. At a higher temperature its frequency is 8.00%8.00\% lower and the capacitance is unchanged. Determine the new effective resistance and its percentage increase.

    [2 marks]

    Total for this question: 2

Tier 3 · Hard

  1. An astable capacitor switches between VS/3V_S/3 and 2VS/32V_S/3, with the output high while the capacitor charges. It charges through 82kΩ82\,\text{k}\Omega, discharges through 33kΩ33\,\text{k}\Omega, and has capacitance 15nF15\,\text{nF}. Calculate the high time, low time, frequency, duty cycle and mark-to-space ratio, taking each threshold time as RCln2RC\ln2.

    [6 marks]

    Total for this question: 6

  2. An astable is required to run at 3.50kHz3.50\,\text{kHz} with duty cycle 60.0%60.0\%. Its capacitor is 12.0nF12.0\,\text{nF} and its timing equations are thigh=0.7(R1+R2)Ct_{\text{high}}=0.7(R_1+R_2)C and tlow=0.7R2Ct_{\text{low}}=0.7R_2C. Determine R1R_1 and R2R_2.

    [2 marks]

    Total for this question: 2

  3. An astable obeys T=0.7(R1+2R2)CT=0.7(R_1+2R_2)C and thigh=0.7(R1+R2)Ct_{\text{high}}=0.7(R_1+R_2)C. The nominal values are R1=46.52kΩR_1=46.52\,\text{k}\Omega, R2=9.90kΩR_2=9.90\,\text{k}\Omega and C=22.0nFC=22.0\,\text{nF}. Each resistor has independent tolerance ±5%\pm5\% and the capacitor has tolerance ±10%\pm10\%. Determine the full possible ranges of frequency and duty cycle.

    [4 marks]

    Total for this question: 4

  4. An astable has thigh=0.7(R+RT)Ct_{\text{high}}=0.7(R+R_T)C and tlow=0.7RCt_{\text{low}}=0.7RC, where R=20.0kΩR=20.0\,\text{k}\Omega and C=10.0nFC=10.0\,\text{nF}. A thermistor has resistance 30.0kΩ30.0\,\text{k}\Omega at the lower temperature and 10.0kΩ10.0\,\text{k}\Omega at the higher temperature. Determine the frequency and duty cycle at each temperature, and explain both changes.

    [5 marks]

    Total for this question: 5

  5. For an astable, the low interval is 0.7R2C0.7R_2C, whereas the high interval is 0.7(R1+R2)C0.7(R_1+R_2)C. Initially R1=15.0kΩR_1=15.0\,\text{k}\Omega, R2=10.0kΩR_2=10.0\,\text{k}\Omega and C=20.0nFC=20.0\,\text{nF}. A load dissipates 0.360W0.360\,\text{W} while the output is high and negligible power while it is low; its maximum permitted average power is 0.240W0.240\,\text{W}. Determine the initial frequency and average power. Keeping R2R_2 and CC unchanged, calculate the greatest allowed R1R_1 and the resulting frequency.

    [5 marks]

    Total for this question: 5

3.13.6.1 · Principles of communication systems

Explanation

  • A real-time communication system is represented by a sequence of functional blocks. The input transducer converts information such as sound into an electrical signal.
  • The transmitter processes that signal into a form suitable for the chosen channel, may modulate a carrier, and supplies enough power. The transmission channel carries the signal and may add attenuation, noise or interference.
  • The receiver selects the wanted signal, amplifies it and recovers the information. Finally, an output transducer converts the recovered electrical signal into the required form, such as sound.
  • Only the purpose of each stage is required, not its internal circuit.
  • The block order and energy or information transformations must remain clear.
Functional blocks of a real-time communication system in signal-flow order.

Worked example

For a live radio broadcast, state the purpose of the transmitter, channel and receiver.

  1. 1.The transmitter prepares the information signal, modulates a carrier and launches the signal.
  2. 2.The radio channel carries the electromagnetic wave and may add noise or attenuation.
  3. 3.The receiver selects the wanted signal and demodulates it to recover the information.

Answer: The three stages prepare and launch, carry, then select and recover the information signal.

Common mistakes

  • Don't place the receiver before the transmission channel.
  • Don't call the carrier the original information rather than the wave modified to carry it.
  • Don't describe detailed circuitry instead of the purpose of each functional block.

Exam tip

For a block-diagram question, use one precise conversion or purpose statement per stage.

Tier 1 · Easy

  1. Place these stages of a real-time communication system in order: receiver, output transducer, transmission channel, input transducer, transmitter.

    [2 marks]

    Total for this question: 2

  2. State the energy conversion carried out by a microphone at the input and by a loudspeaker at the output of a live audio link.

    [2 marks]

    Total for this question: 2

Tier 2 · Standard

  1. In a live radio link, explain the different purposes of the transmitter, transmission channel and receiver.

    [3 marks]

    Total for this question: 3

  2. In a fibre-optic intercom, a test instrument shows the correct electrical audio signal at the receiver output, but the user hears no sound. Identify the faulty functional block and justify why the earlier blocks are not responsible.

    [3 marks]

    Total for this question: 3

  3. A remote river monitor uses water level as its information source and shows the recovered information as a visible reading at a control station. State the purposes of the input transducer and the output transducer, including the energy or signal conversion performed by each.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A remote weather station sends a continuously updated temperature reading to a control room. Describe a complete real-time communication system for this task, giving the purpose of each block and explaining where unwanted noise can affect the recovered reading.

    [5 marks]

    Total for this question: 5

  2. During a communication-system test, the signal at the transmitter output is correct but no signal reaches the receiver input. After that fault is repaired, the signal at the receiver input is correct but the receiver output is distorted. Identify the two faulty functional blocks and justify each choice.

    [3 marks]

    Total for this question: 3

  3. A radio channel attenuates the transmitted signal and adds noise before the signal reaches the receiver. Explain why increasing transmitter power can improve the quality of the recovered information, whereas increasing receiver gain by the same factor cannot restore information already obscured by the channel noise.

    [4 marks]

    Total for this question: 4

  4. A radio link between two valleys uses an unattended relay on a ridge. Starting with a microphone and ending with a loudspeaker, state the complete functional-block order and explain the separate purposes of the relay receiver and relay transmitter.

    [3 marks]

    Total for this question: 3

  5. A remotely operated machine needs a control signal from an operator and a separate position signal returned to the operator. Outline the functional-block order of each communication chain and explain why two chains are required.

    [3 marks]

    Total for this question: 3

3.13.6.2 · Transmission media

Explanation

  • Transmission media include metal wire, optical fibre and electromagnetic paths using radio or microwave.
  • Long-wavelength ground waves diffract around Earth's surface; sky waves can be refracted or reflected by atmospheric layers and return beyond the horizon.
  • Microwaves support line-of-sight terrestrial and satellite links at typical supplied frequencies.
  • Satellite uplink and downlink frequencies differ so a strong transmitted signal does not de-sense the receiver.
  • Media must be compared through data rate, cost and security: fibre offers high capacity and confines the signal but is costly to install; metal wire is established but has limited bandwidth and can radiate; radio covers wide areas without cable but is easier to intercept and shares spectrum.
Ground-wave diffraction and sky-wave refraction or reflection can carry radio beyond the horizon.

Worked example

Compare optical fibre with a radio link for data rate and security.

  1. 1.Optical fibre has a large available bandwidth and therefore supports a high data rate.
  2. 2.Its guided signal remains inside a physical cable, making interception more difficult.
  3. 3.Radio avoids cable installation and covers a wide area, but shared spectrum limits capacity and broadcast signals are easier to intercept.

Answer: Fibre normally offers higher data capacity and physical security; radio offers flexible wide-area coverage at lower installation cost.

Common mistakes

  • Don't claim all radio propagation is line of sight and ignore ground-wave diffraction and sky waves.
  • Don't use the same satellite frequency for uplink and downlink and omit receiver de-sensing.
  • Don't call fibre automatically cheapest without considering installation and interface cost.

Exam tip

A compare question should apply the named criteria—data rate, cost and security—to both media.

Tier 1 · Easy

  1. Identify a suitable transmission medium for a high-data-rate link that should be difficult to intercept, and give one reason for your choice.

    [2 marks]

    Total for this question: 2

  2. Explain why terrestrial microwave relay stations normally require an unobstructed line of sight.

    [2 marks]

    Total for this question: 2

Tier 2 · Standard

  1. Explain two ways in which a radio transmission can reach a receiver beyond the horizon, and relate each way to the wave behaviour involved.

    [4 marks]

    Total for this question: 4

  2. A temporary outdoor event needs a communication link installed quickly between mobile staff. Discuss whether a radio link or newly buried copper cable is more suitable, referring to cost and security.

    [3 marks]

    Total for this question: 3

  3. An emergency beacon must reach receivers beyond the horizon and behind hills without relay stations. It can use either a 200kHz200\,\text{kHz} carrier or a 5.00GHz5.00\,\text{GHz} carrier. Using c=3.00×108m s1c=3.00\times10^8\,\text{m s}^{-1}, determine the more suitable carrier and explain the propagation difference.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A signal travels from one ground station to another through a geostationary satellite 3.60×107m3.60\times10^7\,\text{m} above Earth. Treat both path sections as vertical and use c=3.00×108m s1c=3.00\times10^8\,\text{m s}^{-1}. Calculate the minimum one-way delay, explain why uplink and downlink frequencies differ, and compare this link with optical fibre for data rate and security.

    [6 marks]

    Total for this question: 6

  2. A hospital must transfer a 750MB750\,\text{MB} scan in at most 5.0s5.0\,\text{s}. Use 1byte=8bits1\,\text{byte}=8\,\text{bits}. Installed links offer optical fibre at 2.0Gbit s12.0\,\text{Gbit s}^{-1}, microwave radio at 400Mbit s1400\,\text{Mbit s}^{-1} or copper wire at 200Mbit s1200\,\text{Mbit s}^{-1}. Determine the suitable medium, including a security reason.

    [4 marks]

    Total for this question: 4

  3. At a satellite receiver, the wanted uplink signal has power 8.0×1012W8.0\times10^{-12}\,\text{W}. Leakage from the satellite's downlink transmitter before filtering would be 2.0×106W2.0\times10^{-6}\,\text{W}. The residual leakage must be no more than 10%10\% of the uplink power. Two frequency-selective filters reduce the leakage by factors of 1.0×1061.0\times10^6 and 1.0×1071.0\times10^7, respectively. Determine the minimum required reduction factor and select the suitable filter.

    [4 marks]

    Total for this question: 4

  4. Two microwave stations are 70.0km70.0\,\text{km} apart. Their aerials are 45.0m45.0\,\text{m} and 80.0m80.0\,\text{m} above level ground. Use d=2Rhd=\sqrt{2Rh} for the distance to the horizon from height hh, with Earth radius R=6.37×106mR=6.37\times10^6\,\text{m}. Determine whether the direct path is line of sight. A 25.0m25.0\,\text{m} relay can be placed midway between the stations; determine whether one such relay provides line of sight for both sections.

    [5 marks]

    Total for this question: 5

  5. Model an ionised layer as horizontal and 225km225\,\text{km} above Earth. The aerial cannot radiate rays at more than 62.062.0^\circ to the vertical. Treat each returned hop as symmetrical about its highest point. Determine the greatest ground distance covered by one hop. A link must span 2.75×103km2.75\times10^3\,\text{km}; determine the minimum number of hops and the angle to the vertical when equal hops cover this distance.

    [5 marks]

    Total for this question: 5

3.13.6.3 · Time-division multiplexing

Explanation

  • Time-division multiplexing allows several channels to share one transmission path by assigning each a recurring time slot. A frame contains one slot from each channel in a fixed order, then the pattern repeats.
  • If each frame carries one new sample per channel, frame rate equals each channel's sampling rate; slot rate is frame rate multiplied by channel count.
  • Total bit rate is frame rate multiplied by all bits per frame, including synchronisation or control bits.
  • The receiver uses timing information to separate, or demultiplex, the slots and return samples to their correct channels.
  • Synchronisation is essential because a one-slot timing error would exchange channel data.
A TDM frame assigns one recurring slot to each channel plus synchronisation information.

Worked example

Eight channels are sampled at 6.0kHz6.0\,\text{kHz} using 1212 bits per sample, with 44 sync bits per frame. Calculate the link bit rate.

  1. 1.One frame has 8(12)+4=1008(12)+4=100 bits.
  2. 2.One sample per channel per frame gives frame rate 6.0×103s16.0\times10^3\,\text{s}^{-1}.
  3. 3.Bit rate =(100)(6.0×103)=6.0×105bit s1=(100)(6.0\times10^3)=6.0\times10^5\,\text{bit s}^{-1}.

Answer: The required bit rate is 600kbit s1600\,\text{kbit s}^{-1}.

Common mistakes

  • Don't omit synchronisation bits when calculating total bits per frame.
  • Don't multiply by channel count twice after already counting every channel's bits in a frame.
  • Don't state that TDM sends every channel continuously rather than allocating recurring time slots.

Exam tip

Write bits per frame first, including overhead, then multiply once by frame rate.

Tier 1 · Easy

  1. Four channels share a time-division multiplexed link. Each frame contains one 88-bit slot from every channel. State the number of slots and the number of data bits in one frame.

    [2 marks]

    Total for this question: 2

  2. A time-division multiplexed system sends 2000020\,000 frames each second. Calculate the duration of one frame.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. Six signals are each sampled at 8.0kHz8.0\,\text{kHz} and represented by 1010 bits per sample. One sample from each signal forms a TDM frame with no overhead. Calculate the frame rate, slot rate and transmitted bit rate.

    [4 marks]

    Total for this question: 4

  2. Five channels share a 780kbit s1780\,\text{kbit s}^{-1} TDM link. Each frame contains one 1212-bit sample from each channel and 55 synchronisation bits. Determine the greatest sampling rate per channel.

    [2 marks]

    Total for this question: 2

  3. A TDM frame consists of one synchronisation bit followed, in order, by equal-length slots for channels AA, BB and CC. One synchronisation bit is lost in transmission, so the receiver no longer identifies the correct start of that frame. Explain the consequence for demultiplexing and the recovered channel data until synchronisation is regained.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A TDM system carries 2424 channels, each sampled at 12.0kHz12.0\,\text{kHz} with 1212 bits per sample. Every frame also contains 88 synchronisation bits. Calculate the frame rate, data-slot rate, total bits per frame and transmitted bit rate. Decide whether a 4.00Mbit s14.00\,\text{Mbit s}^{-1} link has sufficient capacity.

    [6 marks]

    Total for this question: 6

  2. A TDM link combines four digital channels. Each frame contains one 1010-bit sample from each channel and 44 synchronisation bits. The frame rate is 8.0kHz8.0\,\text{kHz}. Determine the transmitted bit rate and explain how the receiver separates the channels.

    [3 marks]

    Total for this question: 3

  3. A TDM link transmits at 512kbit s1512\,\text{kbit s}^{-1}. All channels are sampled at 4.00kHz4.00\,\text{kHz}, with one 1212-bit sample from each channel in every frame. Each frame also contains 88 synchronisation bits. Each analogue channel contains frequencies up to 1.50kHz1.50\,\text{kHz}. Determine the number of channels carried and decide whether the sampling rate satisfies the Nyquist condition.

    [3 marks]

    Total for this question: 3

  4. A TDM system combines three channels with different sampling requirements. Channel AA supplies 1010-bit samples at 12.0kHz12.0\,\text{kHz}, channel BB supplies 1212-bit samples at 6.00kHz6.00\,\text{kHz} and channel CC supplies 1616-bit samples at 3.00kHz3.00\,\text{kHz}. A master frame repeats at 3.00kHz3.00\,\text{kHz} and contains 66 synchronisation bits. Determine the number of sample slots allocated to each channel in a master frame, the total bits per master frame and the transmitted bit rate.

    [5 marks]

    Total for this question: 5

  5. A 1.12Mbit s11.12\,\text{Mbit s}^{-1} TDM link sends 80008000 frames each second. Every frame carries one 1212-bit sample from each of six audio channels and 88 synchronisation bits. Each extra sensor needs one 1010-bit sample in every frame. Determine the number of spare bits in one frame before sensor data are added and the greatest number of sensors that can be carried at one sample per frame.

    [2 marks]

    Total for this question: 2

3.13.6.4 · Amplitude (AM) and frequency modulation (FM) techniques

Explanation

  • Modulation changes a high-frequency carrier according to a lower-frequency information signal. In amplitude modulation, carrier amplitude follows the information while carrier frequency stays fixed.
  • In frequency modulation, instantaneous carrier frequency varies while amplitude stays approximately constant. From a time graph, rapid oscillations give carrier frequency; the slower envelope repetition in AM, or compression–spreading pattern in FM, gives information frequency.
  • For maximum information frequency fMf_M, simple AM bandwidth is 2fM2f_M. For FM with maximum deviation Δf\Delta f, bandwidth is 2(Δf+fM)2(\Delta f+f_M).
  • Detailed modulation circuits and advanced mathematical treatment are not required.
  • Wider available channel bandwidth permits greater data capacity but fewer non-overlapping channels.
AM varies carrier amplitude, while FM varies carrier spacing according to the information signal.

Worked example

A signal has fM=7.0kHzf_M=7.0\,\text{kHz}. For FM, Δf=22kHz\Delta f=22\,\text{kHz}. Calculate AM and FM bandwidths.

  1. 1.AM bandwidth =2fM=2(7.0)=14kHz=2f_M=2(7.0)=14\,\text{kHz}.
  2. 2.FM bandwidth =2(Δf+fM)=2(\Delta f+f_M).
  3. 3.FM bandwidth =2(22+7.0)=58kHz=2(22+7.0)=58\,\text{kHz}.

Answer: AM requires 14kHz14\,\text{kHz} and FM requires 58kHz58\,\text{kHz}.

Common mistakes

  • Don't change carrier frequency in an AM sketch instead of changing its amplitude.
  • Don't use the rapid carrier oscillation count as the information frequency.
  • Don't quote AM bandwidth as fMf_M and omit the second sideband.

Exam tip

On a modulation graph, identify carrier frequency from the fast cycles and information frequency from the slow pattern.

Tier 1 · Easy

  1. An AM transmission carries a highest information frequency of 6.0kHz6.0\,\text{kHz}. Calculate its minimum bandwidth.

    [2 marks]

    Total for this question: 2

  2. Identify the modulation technique in which a carrier keeps constant amplitude while its cycle spacing changes with an information signal.

    [1 mark]

    Total for this question: 1

Tier 2 · Standard

  1. A signal with maximum information frequency 8.0kHz8.0\,\text{kHz} frequency-modulates a carrier with maximum deviation 25kHz25\,\text{kHz}. Calculate the FM bandwidth and the bandwidth if the same information used AM.

    [4 marks]

    Total for this question: 4

  2. The spectrum of an AM transmission contains lines at 1.431MHz1.431\,\text{MHz}, 1.438MHz1.438\,\text{MHz} and 1.445MHz1.445\,\text{MHz}. Identify the carrier and the two sidebands, infer the highest information frequency, and state the occupied bandwidth.

    [3 marks]

    Total for this question: 3

  3. The instantaneous frequency of an FM carrier ranges symmetrically from 95.925MHz95.925\,\text{MHz} to 96.075MHz96.075\,\text{MHz}. The highest information frequency is 12.0kHz12.0\,\text{kHz}. Determine the unmodulated carrier frequency, maximum frequency deviation and FM bandwidth.

    [3 marks]

    Total for this question: 3

Tier 3 · Hard

  1. A broadcast signal has maximum information frequency 15kHz15\,\text{kHz}. In FM its maximum frequency deviation is 75kHz75\,\text{kHz}. Calculate the FM and AM bandwidths and hence the greatest ideal number of non-overlapping channels of each type in a 900kHz900\,\text{kHz} allocation. Explain one signal-to-noise advantage and one channel-usage disadvantage of FM.

    [6 marks]

    Total for this question: 6

  2. A voltage--time graph of an FM signal shows that the cycle-spacing pattern repeats every 0.50ms0.50\,\text{ms}. The trace contains 125125 complete carrier cycles during one repetition of that pattern. Determine the carrier frequency and the information frequency.

    [2 marks]

    Total for this question: 2

  3. A telemetry channel has usable bandwidth 136kHz136\,\text{kHz}. To meet its noise-performance requirement, an FM transmission must have maximum frequency deviation at least three times its highest information frequency. Determine the greatest possible information frequency and the corresponding minimum frequency deviation.

    [2 marks]

    Total for this question: 2

  4. Two AM transmitters have carrier frequencies 720kHz720\,\text{kHz} and 746kHz746\,\text{kHz}. Their highest information frequencies are 9.00kHz9.00\,\text{kHz} and 13.0kHz13.0\,\text{kHz}, respectively. Determine the occupied frequency range of each transmission and the unused frequency interval between them.

    [3 marks]

    Total for this question: 3

  5. An FM transmitter is assigned a channel extending 95.0kHz95.0\,\text{kHz} either side of its nominal carrier frequency. Its actual unmodulated carrier may drift by up to 7.00kHz7.00\,\text{kHz} towards either edge, and its maximum frequency deviation is fixed at 52.0kHz52.0\,\text{kHz}. Using B=2(Δf+fM)B=2(\Delta f+f_M), determine the greatest permitted information frequency in the worst case and the corresponding transmitted bandwidth.

    [2 marks]

    Total for this question: 2

Answer key

Answers begin on a new printed page so the question pack can be completed without the solutions alongside it.

3.13.1.1 · MOSFET (metal-oxide semiconducting field-effect transistor)

Tier 1 · Easy

Mark scheme for 3.13.1.1 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • VGS>VthV_{\mathrm{GS}}>V_{\mathrm{th}}.
A conducting channel begins to form when the gate-source potential difference exceeds the threshold value, so the condition is VGS>VthV_{\mathrm{GS}}>V_{\mathrm{th}}.1
02.1
  • The drain-source current when VGS=0V_{\mathrm{GS}}=0 (only a very small leakage current in an enhancement-mode device).
IDSSI_{\mathrm{DSS}} is the small drain-source current that flows at VGS=0V_{\mathrm{GS}}=0, when the enhancement-mode device should be off.1

Tier 2 · Standard

Mark scheme for 3.13.1.1 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 3.0MΩ3.0\,\text{M}\Omega
The insulated gate takes negligible current, so the two resistors form an unloaded potential divider. At threshold, 3.0=9.0×1.5R+1.53.0=9.0\times\frac{1.5}{R+1.5}, with resistances in MΩ\text{M}\Omega. Hence R+1.5=4.5R+1.5=4.5 and R=3.0MΩR=3.0\,\text{M}\Omega.3
02.1
  • VGS=5.34VV_{\mathrm{GS}}=5.34\,\text{V}
The resistor potential difference is VR=IR=(30.0×109)(22.0×106)=0.660VV_R=IR=(30.0\times10^{-9})(22.0\times10^6)=0.660\,\text{V}. The gate potential is therefore 6.000.660=5.34V6.00-0.660=5.34\,\text{V} to three significant figures. Since the source is at 0V0\,\text{V}, VGS=5.34VV_{\mathrm{GS}}=5.34\,\text{V}.2
03.1
  • The MOSFET is off at 0.30V0.30\,\text{V} and on at 4.80V4.80\,\text{V} for every stated threshold; the insulated gate gives a very high input resistance, so its steady current and input power are negligible.
Because the source is at 0V0\,\text{V}, the two gate levels are also the two values of VGSV_{\mathrm{GS}}. The low level, 0.30V0.30\,\text{V}, is below even the smallest possible VthV_{\mathrm{th}}, so no channel forms. The high level, 4.80V4.80\,\text{V}, is above even the largest possible VthV_{\mathrm{th}}, so a channel forms. The oxide layer insulates the gate, giving a very high input resistance and hence negligible steady gate current and input power.3

Tier 3 · Hard

Mark scheme for 3.13.1.1 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • VDS=3.24VV_{\mathrm{DS}}=3.24\,\text{V}, Pload=0.276WP_{\mathrm{load}}=0.276\,\text{W} and PMOSFET=0.156WP_{\mathrm{MOSFET}}=0.156\,\text{W}; it is not acting as an efficient fully-on switch.
The load line is VDS=9.0ID(120)V_{\mathrm{DS}}=9.0-I_{\mathrm{D}}(120). Using ID=0.048AI_{\mathrm{D}}=0.048\,\text{A} gives VDS=9.0(0.048)(120)=3.24VV_{\mathrm{DS}}=9.0-(0.048)(120)=3.24\,\text{V}. This is at least 2.0V2.0\,\text{V}, so the assumed part of the output characteristic is self-consistent. The load power is Pload=ID2R=(0.048)2(120)=0.27648W=0.276WP_{\mathrm{load}}=I_{\mathrm{D}}^2R=(0.048)^2(120)=0.27648\,\text{W}=0.276\,\text{W}. The MOSFET dissipates PMOSFET=IDVDS=(0.048)(3.24)=0.156WP_{\mathrm{MOSFET}}=I_{\mathrm{D}}V_{\mathrm{DS}}=(0.048)(3.24)=0.156\,\text{W}. A fully-on switch should have a very small VDSV_{\mathrm{DS}} and small dissipation, so this operating point is not an efficient fully-on state.4
02.1
  • An insulating oxide (silicon dioxide) layer separates the gate from the semiconductor, so negligible steady gate current flows. A positive gate-source potential creates an electric field; above the threshold potential difference this field forms an n-channel between source and drain, allowing drain current. Below threshold the channel is absent, so the device is off.
Link each behaviour to the structure. The silicon dioxide layer is insulating, which accounts for the very high gate input resistance. The gate-source potential difference acts through the oxide by an electric field rather than by a gate current. When VGS>VthV_{\mathrm{GS}}>V_{\mathrm{th}}, the field creates a conducting n-channel joining source and drain, so IDI_{\mathrm D} can flow. When VGS<VthV_{\mathrm{GS}}<V_{\mathrm{th}}, that channel is absent and the drain-source path is switched off.4
03.1
  • I=0.50AI=0.50\,\text{A}; PMOSFET=1.5WP_{\mathrm{MOSFET}}=1.5\,\text{W}; 12.5%12.5\% of the supply power is wasted in the MOSFET.
The MOSFET and load are in series, so the circuit resistance is 6.0+42=48Ω6.0+42=48\,\Omega and I=24/48=0.50AI=24/48=0.50\,\text{A}. The MOSFET dissipates P=I2Ron=(0.50)2(6.0)=1.5WP=I^2R_{\mathrm{on}}=(0.50)^2(6.0)=1.5\,\text{W}. The supply delivers P=VI=(24)(0.50)=12WP=VI=(24)(0.50)=12\,\text{W}, so the wasted percentage is 1.5/12=12.5%1.5/12=12.5\%. This is already a substantial loss, which is why practical switching MOSFETs have on-resistances far below the load resistance.3
04.1
  • The drain current increases by 110%110\% (about 1.1×102%1.1\times10^2\%). The student is incorrect for the whole on-state: IDI_{\mathrm D} changes at low VDSV_{\mathrm{DS}}, although this characteristic is approximately flat from 2.0V2.0\,\text{V} to 4.0V4.0\,\text{V}.
  • accept 112.5%112.5\% or 113%113\% before rounding to two significant figures
Use the two stated read-offs: the increase is 0.340.16=0.18A0.34-0.16=0.18\,\text{A}, so the percentage increase is (0.18/0.16)×100=112.5%(0.18/0.16)\times100=112.5\%, or 1.1×102%1.1\times10^2\% to two significant figures. This substantial rise shows that the claim is not valid across the complete on-state. The equal 0.34A0.34\,\text{A} read-offs at 2.0V2.0\,\text{V} and 4.0V4.0\,\text{V} show why the claim is a useful approximation only on the nearly horizontal part of this particular output characteristic.4
05.1
  • IG=1.0pAI_{\mathrm G}=1.0\,\text{pA}, Rin=4.0×1012ΩR_{\mathrm{in}}=4.0\times10^{12}\,\Omega and ID/IG=2.4×1011I_{\mathrm D}/I_{\mathrm G}=2.4\times10^{11}.
The resistor potential difference is given directly, so IG=(4.7×106)/(4.7×106)=1.0×1012A=1.0pAI_{\mathrm G}=(4.7\times10^{-6})/(4.7\times10^6)=1.0\times10^{-12}\,\text{A}=1.0\,\text{pA}. The ideal voltmeter adds no current. Hence Rin=VGS/IG=4.0/(1.0×1012)=4.0×1012ΩR_{\mathrm{in}}=V_{\mathrm{GS}}/I_{\mathrm G}=4.0/(1.0\times10^{-12})=4.0\times10^{12}\,\Omega. Finally, ID/IG=0.24/(1.0×1012)=2.4×1011I_{\mathrm D}/I_{\mathrm G}=0.24/(1.0\times10^{-12})=2.4\times10^{11}.3

3.13.1.2 · Zener diode

Tier 1 · Easy

Mark scheme for 3.13.1.2 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Reverse bias in the Zener breakdown region.
The nearly constant-voltage part of a Zener characteristic is its reverse-breakdown region, so the diode must be reverse biased beyond the Zener voltage.1
02.1
  • It limits the current through the Zener diode.
Once breakdown begins, the Zener voltage changes very little while its current can rise rapidly. The series resistor drops the remaining supply voltage and limits that current.1

Tier 2 · Standard

Mark scheme for 3.13.1.2 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 400Ω400\,\Omega
The resistor potential difference is VR=12.05.6=6.4VV_R=12.0-5.6=6.4\,\text{V}. The no-load resistor current equals the Zener current, IR=16mA=0.016AI_R=16\,\text{mA}=0.016\,\text{A}. Therefore R=VR/IR=6.4/0.016=400ΩR=V_R/I_R=6.4/0.016=400\,\Omega.3
02.1
  • Beyond the Zener breakdown voltage, a large change in reverse current produces only a small change in voltage. The current must remain above the typical minimum operating value, so the voltage is then nearly constant and can act as a reference.
Identify the reverse-breakdown section of the characteristic. Its steep current variation for little voltage variation means the diode potential difference stays close to VZV_{\mathrm Z}. This behaviour applies once the reverse current exceeds the typical minimum operating current, allowing VZV_{\mathrm Z} to serve as a reference.3
03.1
  • PR=0.176WP_R=0.176\,\text{W}, so use a 0.25W0.25\,\text{W} resistor.
The resistor potential difference is 14.07.5=6.5V14.0-7.5=6.5\,\text{V}, so PR=VR2/R=6.52/240=0.176WP_R=V_R^2/R=6.5^2/240=0.176\,\text{W}. The 0.125W0.125\,\text{W} rating is smaller than this dissipation, so the next available rating, 0.25W0.25\,\text{W}, is required.2

Tier 3 · Hard

Mark scheme for 3.13.1.2 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 330Ω330\,\Omega; use at least a 0.25W0.25\,\text{W} resistor and a 0.25W0.25\,\text{W} Zener diode.
At maximum load the resistor must supply IS=IL+IZ,min=18+5=23mAI_{\mathrm{S}}=I_{\mathrm{L}}+I_{\mathrm{Z,min}}=18+5=23\,\text{mA}. Its maximum allowed resistance is Rmax=(14.06.2)/(0.023)=339ΩR_{\max}=(14.0-6.2)/(0.023)=339\,\Omega, so only 330Ω330\,\Omega is suitable. With the load disconnected, all resistor current enters the Zener: I=(14.06.2)/330=0.0236AI=(14.0-6.2)/330=0.0236\,\text{A}. The resistor dissipates PR=I2R=(0.0236)2(330)=0.184WP_R=I^2R=(0.0236)^2(330)=0.184\,\text{W}, and the Zener dissipates PZ=(6.2)(0.0236)=0.147WP_{\mathrm{Z}}=(6.2)(0.0236)=0.147\,\text{W}. The next stated rating above each value is 0.25W0.25\,\text{W}.5
02.1
  • The maximum load current is 16.8mA16.8\,\text{mA}. Above this current the Zener current falls below its minimum operating value, so the diode leaves breakdown and the output is no longer maintained at 6.8V6.8\,\text{V}.
The series-resistor current is IR=(14.06.8)/330=21.818mAI_R=(14.0-6.8)/330=21.818\ldots\,\text{mA}. At the maximum load, the Zener must still receive 5.0mA5.0\,\text{mA}, so IL,max=21.8185.0=16.818mA=16.8mAI_{\mathrm{L,max}}=21.818\ldots-5.0=16.818\ldots\,\text{mA}=16.8\,\text{mA} to three significant figures. This rounded value is just below the exact limit, so it still leaves at least 5.0mA5.0\,\text{mA} through the Zener. A larger load current leaves less than the minimum Zener current, so the diode is no longer in its breakdown region and cannot hold the output at 6.8V6.8\,\text{V}.4
03.1
  • IZ=26.5mAI_{\mathrm Z}=26.5\,\text{mA} and VZ=6.23VV_{\mathrm Z}=6.23\,\text{V}
  • accept IZI_{\mathrm Z} in the range 26.426.426.6mA26.6\,\text{mA} and VZV_{\mathrm Z} in the range 6.26.26.25V6.25\,\text{V}
Between the two graph points, a 20.0mA20.0\,\text{mA} current change corresponds to a 0.20V0.20\,\text{V} voltage change, so the straight graph section is VZ=5.97+10.0IZV_{\mathrm Z}=5.97+10.0I_{\mathrm Z} when current is in amperes. The resistor gives 11.0=180IZ+VZ11.0=180I_{\mathrm Z}+V_{\mathrm Z}. Combining these relations gives 11.0=190IZ+5.9711.0=190I_{\mathrm Z}+5.97, so IZ=0.02647A=26.5mAI_{\mathrm Z}=0.02647\,\text{A}=26.5\,\text{mA} and VZ=11.0(0.02647)(180)=6.23VV_{\mathrm Z}=11.0-(0.02647)(180)=6.23\,\text{V}.4
04.1
  • ΔVZ=0V\Delta V_{\mathrm Z}=0\,\text{V}, the second supply potential is 13.2V13.2\,\text{V} and the Zener power increases by 0.11W0.11\,\text{W}.
In the specified constant-voltage model, VZV_{\mathrm Z} remains 6.2V6.2\,\text{V}, so its change is zero. At 26mA26\,\text{mA} the resistor potential difference is IR=(0.026)(270)=7.02VIR=(0.026)(270)=7.02\,\text{V} and the supply is 6.2+7.02=13.22V=13.2V6.2+7.02=13.22\,\text{V}=13.2\,\text{V}. The Zener power increase is ΔP=VZ(I2I1)=6.2(0.0260.0080)=0.1116W=0.11W\Delta P=V_{\mathrm Z}(I_2-I_1)=6.2(0.026-0.0080)=0.1116\,\text{W}=0.11\,\text{W}.3
05.1
  • 6.57VVS12.2V6.57\,\text{V}\leq V_{\mathrm S}\leq12.2\,\text{V} and the greatest Zener power is 0.113W0.113\,\text{W}.
  • accept an upper limit of 12.2312.2312.24V12.24\,\text{V} before rounding
While the diode is in breakdown, the load current is IL=4.7/1200=3.9167mAI_{\mathrm L}=4.7/1200=3.9167\,\text{mA}. At the lower supply limit the resistor current is 3.9167+3.0=6.9167mA3.9167+3.0=6.9167\,\text{mA}, so VS,min=4.7+(0.0069167)(270)=6.5675V=6.57VV_{\mathrm S,min}=4.7+(0.0069167)(270)=6.5675\,\text{V}=6.57\,\text{V}. At the upper limit it is 3.9167+24=27.9167mA3.9167+24=27.9167\,\text{mA}, giving VS,max=4.7+(0.0279167)(270)=12.2375V=12.2VV_{\mathrm S,max}=4.7+(0.0279167)(270)=12.2375\,\text{V}=12.2\,\text{V} to three significant figures. Maximum diode power occurs at 24mA24\,\text{mA}: PZ=(4.7)(0.024)=0.1128W=0.113WP_{\mathrm Z}=(4.7)(0.024)=0.1128\,\text{W}=0.113\,\text{W}.4

3.13.1.3 · Photodiode

Tier 1 · Easy

Mark scheme for 3.13.1.3 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Photoconductive mode.
A reverse-biased photodiode is operating in photoconductive mode; photovoltaic mode uses no external bias.1
02.1
  • A spectral-response curve.
A spectral-response curve plots the response or sensitivity of the photodiode against wavelength.1

Tier 2 · Standard

Mark scheme for 3.13.1.3 Tier 2 · Standard
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01.1
  • 0.60V0.60\,\text{V}
The photocurrent is Ip=SP=(0.42)(8.0×106)=3.36×106AI_{\mathrm{p}}=SP=(0.42)(8.0\times10^{-6})=3.36\times10^{-6}\,\text{A}. The resistor voltage is V=IR=(3.36×106)(180×103)=0.6048VV=IR=(3.36\times10^{-6})(180\times10^3)=0.6048\,\text{V}, which is 0.60V0.60\,\text{V} to two significant figures.3
02.1
  • 3.6μA3.6\,\mu\text{A}
The responsivity at 900nm900\,\text{nm} is 0.60(0.50)=0.30A W10.60(0.50)=0.30\,\text{A W}^{-1}. Hence I=SP=(0.30)(12×106)=3.6×106A=3.6μAI=SP=(0.30)(12\times10^{-6})=3.6\times10^{-6}\,\text{A}=3.6\,\mu\text{A}.3
03.1
  • 900nm900\,\text{nm}
At 650nm650\,\text{nm} the responsivity is 0.80(0.45)=0.36A W10.80(0.45)=0.36\,\text{A W}^{-1}, so the source power is P=I/S=(4.32×106)/0.36=12.0μWP=I/S=(4.32\times10^{-6})/0.36=12.0\,\mu\text{W}. The unknown-wavelength responsivity is S=(2.70×106)/(12.0×106)=0.225A W1S=(2.70\times10^{-6})/(12.0\times10^{-6})=0.225\,\text{A W}^{-1}, giving relative response 0.225/0.45=0.500.225/0.45=0.50. Of the three stated wavelengths, this is 900nm900\,\text{nm}.3

Tier 3 · Hard

Mark scheme for 3.13.1.3 Tier 3 · Hard
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01.1
  • The scintillator flash produces a photodiode current pulse; the voltage magnitude is 0.52V0.52\,\text{V} and the pulse contains 3.0×1053.0\times10^5 charge carriers.
The particle excites the scintillator, which emits a flash; the reverse-biased photodiode converts that light pulse into an electrical current pulse. The current is I=SP=(0.48)(4.0×106)=1.92×106AI=SP=(0.48)(4.0\times10^{-6})=1.92\times10^{-6}\,\text{A}. The readout voltage magnitude is V=IR=(1.92×106)(270×103)=0.5184V=0.52VV=IR=(1.92\times10^{-6})(270\times10^3)=0.5184\,\text{V}=0.52\,\text{V}. The charge in 25ns25\,\text{ns} is Q=It=(1.92×106)(25×109)=4.80×1014CQ=It=(1.92\times10^{-6})(25\times10^{-9})=4.80\times10^{-14}\,\text{C}. Hence the number of carriers is N=Q/e=(4.80×1014)/(1.60×1019)=3.0×105N=Q/e=(4.80\times10^{-14})/(1.60\times10^{-19})=3.0\times10^5.5
02.1
  • P850/P520=1.6P_{850}/P_{520}=1.6
After the filter, P520=I/S=(3.36×106)/0.28=12.0μWP_{520}=I/S=(3.36\times10^{-6})/0.28=12.0\,\mu\text{W} and P850=(8.40×106)/0.56=15.0μWP_{850}=(8.40\times10^{-6})/0.56=15.0\,\mu\text{W}. Before the filter, the powers were 12.0/0.75=16.0μW12.0/0.75=16.0\,\mu\text{W} and 15.0/0.60=25.0μW15.0/0.60=25.0\,\mu\text{W}. Therefore P850/P520=25.0/16.0=1.5625=1.6P_{850}/P_{520}=25.0/16.0=1.5625=1.6 to two significant figures.5
03.1
  • Q=6.48×1011CQ=6.48\times10^{-11}\,\text{C} and N=4.05×108N=4.05\times10^8 carriers
The flash-induced photocurrent is the difference between the illuminated and dark graph readings: Ip=5.600.20=5.40μAI_{\mathrm p}=5.60-0.20=5.40\,\mu\text{A}. The pulse charge is Q=Ipt=(5.40×106)(12.0×106)=6.48×1011CQ=I_{\mathrm p}t=(5.40\times10^{-6})(12.0\times10^{-6})=6.48\times10^{-11}\,\text{C}. Hence N=Q/e=(6.48×1011)/(1.60×1019)=4.05×108N=Q/e=(6.48\times10^{-11})/(1.60\times10^{-19})=4.05\times10^8 charge carriers.3
04.1
  • Ip=7.4μAI_{\mathrm p}=7.4\,\mu\text{A} and V=0.89VV=0.89\,\text{V}.
The responsivities are S480=0.35(0.62)=0.217A W1S_{480}=0.35(0.62)=0.217\,\text{A W}^{-1} and S720=0.80(0.62)=0.496A W1S_{720}=0.80(0.62)=0.496\,\text{A W}^{-1}. The two photocurrents add, so Ip=(0.217)(18×106)+(0.496)(7.0×106)=3.906×106+3.472×106=7.378×106A=7.4μAI_{\mathrm p}=(0.217)(18\times10^{-6})+(0.496)(7.0\times10^{-6})=3.906\times10^{-6}+3.472\times10^{-6}=7.378\times10^{-6}\,\text{A}=7.4\,\mu\text{A} to two significant figures. Hence V=IR=(7.378×106)(120×103)=0.88536V=0.89VV=IR=(7.378\times10^{-6})(120\times10^3)=0.88536\,\text{V}=0.89\,\text{V} to two significant figures.4
05.1
  • 3.00×1033.00\times10^3 particles; each particle produces scintillator light that the photodiode converts into a current pulse.
An incident particle transfers energy to the scintillator, which emits a light pulse; the reverse-biased photodiode converts the light into an electrical current pulse. Responsivity gives charge per optical energy because S=I/P=Q/ES=I/P=Q/E. Thus one pulse produces Q1=SE=(0.44)(3.6×1013)=1.584×1013CQ_1=SE=(0.44)(3.6\times10^{-13})=1.584\times10^{-13}\,\text{C}. The count is N=Qtotal/Q1=(4.752×1010)/(1.584×1013)=3.00×103N=Q_{\mathrm{total}}/Q_1=(4.752\times10^{-10})/(1.584\times10^{-13})=3.00\times10^3.4

3.13.1.4 · Hall effect sensor

Tier 1 · Easy

Mark scheme for 3.13.1.4 Tier 1 · Easy
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01.1
  • The Hall voltage doubles.
With current and geometry fixed, VHBV_{\mathrm{H}}\propto B. Doubling BB therefore doubles VHV_{\mathrm{H}}.1
02.1
  • Moving the surface changes the flux density at the sensor, so the Hall output changes. Calibrating output against angle gives the attitude.
Moving the surface changes the flux density at the fixed Hall sensor, producing a corresponding change in output. A calibration of output against angle then gives the surface's attitude.2

Tier 2 · Standard

Mark scheme for 3.13.1.4 Tier 2 · Standard
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01.1
  • 2.492V2.492\,\text{V}
The Hall-voltage change is ΔV=(45×103)(0.18)=8.1×103V\Delta V=(45\times10^{-3})(-0.18)=-8.1\times10^{-3}\,\text{V}. Add this signed change to the offset: Vout=2.5000.0081=2.4919VV_{\mathrm{out}}=2.500-0.0081=2.4919\,\text{V}, giving 2.492V2.492\,\text{V}.3
02.1
  • +3.0+3.0^\circ
The output changes by 1.200V1.200\,\text{V} across 60.060.0^\circ, so the sensitivity is 1.200/60.0=0.0200V degree11.200/60.0=0.0200\,\text{V degree}^{-1}. Zero attitude corresponds to the midpoint output, 2.400V2.400\,\text{V}. The measured output is 0.060V0.060\,\text{V} above this, so the angle is 0.060/0.0200=+3.00.060/0.0200=+3.0^\circ.3
03.1
  • 960rev min1960\,\text{rev min}^{-1} and 8.93ms8.93\,\text{ms} between successive pulses.
The pulse frequency is 280/2.50=112Hz280/2.50=112\,\text{Hz}. Seven pulses occur per revolution, so the rotation frequency is 112/7=16.0rev s1112/7=16.0\,\text{rev s}^{-1}, giving 16.0×60=960rev min116.0\times60=960\,\text{rev min}^{-1}. The mean interval between successive pulses is 1/112=8.93×103s=8.93ms1/112=8.93\times10^{-3}\,\text{s}=8.93\,\text{ms}.3

Tier 3 · Hard

Mark scheme for 3.13.1.4 Tier 3 · Hard
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01.1
  • 40mT40\,\text{mT} and 1.8×103rev min11.8\times10^3\,\text{rev min}^{-1}
For fixed sensor current and geometry, VHBV_{\mathrm{H}}\propto B. Therefore B=(0.120/0.180)(60mT)=40mTB=(0.120/0.180)(60\,\text{mT})=40\,\text{mT}. Six pulses are produced per revolution, so the rotation frequency is 180/6=30rev s1180/6=30\,\text{rev s}^{-1}. Multiplying by 60s min160\,\text{s min}^{-1} gives 30×60=1.8×103rev min130\times60=1.8\times10^3\,\text{rev min}^{-1}.5
02.1
  • 1515 magnets; more magnets give more pulses per revolution, so the rotation can be measured over a shorter time interval or with finer angular resolution.
The rotation frequency is 840/60=14rev s1840/60=14\,\text{rev s}^{-1}. Since pulse frequency equals rotation frequency multiplied by the number of magnets, the number is 210/14=15210/14=15. Adding magnets increases the number of pulses in each revolution, reducing the time or angle between readings.3
03.1
  • The true speed is 2.50×103rev min12.50\times10^3\,\text{rev min}^{-1}; the controller displays 2.29×103rev min12.29\times10^3\,\text{rev min}^{-1}, an 8.33%8.33\% underestimate.
One complete pulse pattern lasts 10(2.00)+4.00=24.0ms10(2.00)+4.00=24.0\,\text{ms} and corresponds to one rotor revolution. The true rotation frequency is therefore 1/(24.0×103)=41.67rev s11/(24.0\times10^{-3})=41.67\,\text{rev s}^{-1}, giving 41.67×60=2.50×103rev min141.67\times60=2.50\times10^3\,\text{rev min}^{-1}. Only 1111 pulses occur per revolution, so the mean pulse frequency is 11/(24.0×103)=458.3Hz11/(24.0\times10^{-3})=458.3\,\text{Hz}. The controller displays (458.3/12)(60)=2.29×103rev min1(458.3/12)(60)=2.29\times10^3\,\text{rev min}^{-1}. Its percentage error is [(2291.72500)/2500]×100=8.33%[(2291.7-2500)/2500]\times100=-8.33\%, so it underestimates the speed by 8.33%8.33\% because it assumes the missing twelfth pulse is present.4
04.1
  • θ=+24\theta=+24^\circ; an equal common drift cancels when one output is subtracted from the other.
  • accept finding θ=(2.2442.10)/0.0060=+24\theta=(2.244-2.10)/0.0060=+24^\circ from V1V_1 alone
Subtracting the calibration equations gives V1V2=0.16+0.0120θV_1-V_2=-0.16+0.0120\theta. The measured difference is 2.2442.116=0.128V2.244-2.116=0.128\,\text{V}, so 0.128=0.16+0.0120θ0.128=-0.16+0.0120\theta and θ=0.288/0.0120=+24\theta=0.288/0.0120=+24^\circ. If a drift dd is added to both outputs, (V1+d)(V2+d)=V1V2(V_1+d)-(V_2+d)=V_1-V_2, so the inferred attitude is unchanged.3
05.1
  • 7272 pulses are expected; the measured count is not consistent with the intended speed; the minimum gate time is 0.67s0.67\,\text{s}.
The intended rotation frequency is 1200/60=20rev s11200/60=20\,\text{rev s}^{-1}, so the expected count is (20)(9)(0.400)=72(20)(9)(0.400)=72 pulses. The measured interval is 7575 to 7777 pulses, which does not contain 7272, so the result is not consistent with the intended speed. For gate time tt, one pulse corresponds to 60/(9t)rev min160/(9t)\,\text{rev min}^{-1}. Requiring 60/(9t)1060/(9t)\leq10 gives t0.666st\geq0.666\ldots\,\text{s}, so the minimum time is 0.67s0.67\,\text{s}.4

3.13.2.1 · Difference between analogue and digital signals

Tier 1 · Easy

Mark scheme for 3.13.2.1 Tier 1 · Easy
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01.1
  • An analogue signal varies continuously, whereas a binary digital signal has two discrete levels.
The defining contrast is continuous variation for analogue information and discrete allowed levels for digital information; binary uses two such levels.1
02.1
  • 2424 bits
One byte contains eight bits, so three bytes contain 3×8=243\times8=24 bits.1

Tier 2 · Standard

Mark scheme for 3.13.2.1 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 18.75mV18.75\,\text{mV} and ±9.38mV\pm9.38\,\text{mV}
An 88-bit code gives 28=2562^8=256 intervals. Their width is ΔV=4.8/256=0.01875V=18.75mV\Delta V=4.8/256=0.01875\,\text{V}=18.75\,\text{mV}. Rounding to the nearest level gives a maximum error of half an interval, ±ΔV/2=±9.375mV\pm\Delta V/2=\pm9.375\,\text{mV}, or ±9.38mV\pm9.38\,\text{mV}.3
02.1
  • Binary 10101010, which is decimal 1010.
Applying the decision level gives 1,0,1,01,0,1,0, so the recovered code is 10101010. Its place values are 8,4,2,18,4,2,1, hence 1010=8+2=101010=8+2=10 in decimal.2
03.1
  • 66 bits per sample, 6464 quantisation levels and a 50mV50\,\text{mV} interval.
The available bits per sample are (36×103)/(6.0×103)=6(36\times10^3)/(6.0\times10^3)=6. This gives 26=642^6=64 quantisation levels. The interval is 3.2/64=0.050V=50mV3.2/64=0.050\,\text{V}=50\,\text{mV}.3

Tier 3 · Hard

Mark scheme for 3.13.2.1 Tier 3 · Hard
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01.1
  • The rate is sufficient; the recording contains 6.3×1066.3\times10^6 bits or 7.9×1057.9\times10^5 bytes, and 88-bit conversion reduces data rate but increases quantisation error.
The minimum sampling rate is 2fmax=2(4.0)=8.0kHz2f_{\max}=2(4.0)=8.0\,\text{kHz}, so 10kHz10\,\text{kHz} is sufficient. The bit rate is (10×103)(14)=1.40×105bit s1(10\times10^3)(14)=1.40\times10^5\,\text{bit s}^{-1}. In 45s45\,\text{s} the data size is (1.40×105)(45)=6.30×106(1.40\times10^5)(45)=6.30\times10^6 bits. Dividing by 88 gives 7.875×1057.875\times10^5 bytes, or 7.9×1057.9\times10^5 bytes to two significant figures. Reducing to 88 bits gives only 28=2562^8=256 levels instead of 214=163842^{14}=16384, so it lowers bit rate and storage but increases quantisation steps, quantisation noise and loss of amplitude detail.5
02.1
  • A regenerator compares each noisy pulse with decision levels, identifies a 0 or 1, and produces a new pulse at the standard level and shape, so small added noise is removed at each stage. If noise crosses a decision level, a bit error can still occur. Sampling omits changes between sample times and quantisation replaces a range of analogue values by one level; that discarded information is absent from the bit stream, so later regeneration cannot recreate it.
Separate transmission noise from conversion loss. During transmission, two distinct digital levels allow a regenerator to decide which bit was intended and reshape the pulse, provided the noise has not moved it across the decision threshold. Repeating this process prevents small disturbances from building up. During analogue-to-digital conversion, finite sampling leaves the signal between samples unrecorded and finite resolution rounds each sample to a quantised level. Several original values therefore produce the same code. A regenerator receives only that code, so it has no evidence from which to restore the discarded time or amplitude detail.5
03.1
  • Nyquist minimum rates: 2.0kHz2.0\,\text{kHz} for the 1.0kHz1.0\,\text{kHz} signal and 14.0kHz14.0\,\text{kHz} for the 7.0kHz7.0\,\text{kHz} signal. At 8.0kHz8.0\,\text{kHz} the 7.0kHz7.0\,\text{kHz} signal is undersampled and every one of its samples coincides with the corresponding sample of the 1.0kHz1.0\,\text{kHz} signal, so the two inputs are indistinguishable.
The Nyquist condition requires a sampling rate of at least twice the signal frequency, so the minimum rates are 2(1.0)=2.0kHz2(1.0)=2.0\,\text{kHz} and 2(7.0)=14.0kHz2(7.0)=14.0\,\text{kHz}. The 8.0kHz8.0\,\text{kHz} rate exceeds the first but not the second. At the sample instants t=n/8000st=n/8000\,\text{s}, cos(2π(7000)n/8000)=cos(2πn2π(1000)n/8000)=cos(2π(1000)n/8000)\cos(2\pi(7000)n/8000)=\cos(2\pi n-2\pi(1000)n/8000)=\cos(2\pi(1000)n/8000), so each sample of the 7.0kHz7.0\,\text{kHz} signal equals the corresponding sample of the 1.0kHz1.0\,\text{kHz} signal. The undersampled 7.0kHz7.0\,\text{kHz} input is therefore reconstructed as its 1.0kHz1.0\,\text{kHz} alias.3
04.1
  • reject 1414: after 1414 sections both worst-case levels sit exactly at 2.50V2.50\,\text{V}
  • 1313 consecutive sections; after four sections both levels remain on the correct side of 2.50V2.50\,\text{V}, and regeneration restores their standard values before the next group.
After NN sections the worst-case levels are 0.40+0.15N0.40+0.15N and 4.600.15N4.60-0.15N. Correct decisions require 0.40+0.15N<2.500.40+0.15N<2.50 and 4.600.15N>2.504.60-0.15N>2.50. Both give N<14N<14, so the greatest whole number is 1313; the levels are then 2.35V2.35\,\text{V} and 2.65V2.65\,\text{V}, each one full section-step from the decision level. After four sections they are 1.00V1.00\,\text{V} and 4.00V4.00\,\text{V}. A regenerator identifies the bits and recreates 0.40V0.40\,\text{V} and 4.60V4.60\,\text{V}, so the displacement does not carry into the next four-section group.4
05.1
  • The converter needs at least 99 bits per sample and a minimum bit rate of 90kbit s190\,\text{kbit s}^{-1}, so the 96kbit s196\,\text{kbit s}^{-1} link can carry the data.
An error limit of 4.0mV4.0\,\text{mV} requires an interval no greater than 8.0mV8.0\,\text{mV}. Therefore 3.3/2n0.00803.3/2^n\leq0.0080, so 2n412.52^n\geq412.5. Eight bits give only 256256 intervals, whereas nine give 512512, so the minimum is n=9n=9. Nyquist sampling requires at least 2(5.0)=10kHz2(5.0)=10\,\text{kHz}. The minimum bit rate is therefore (9)(10×103)=90×103bit s1=90kbit s1(9)(10\times10^3)=90\times10^3\,\text{bit s}^{-1}=90\,\text{kbit s}^{-1}. This is below the 96kbit s196\,\text{kbit s}^{-1} limit, so both requirements can be met.4

3.13.3.1 · LC resonance filters

Tier 1 · Easy

Mark scheme for 3.13.3.1 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 4.0×104Hz4.0\times10^4\,\text{Hz}
Convert to SI units: L=2.0×103HL=2.0\times10^{-3}\,\text{H} and C=8.0×109FC=8.0\times10^{-9}\,\text{F}. Then f0=1/[2π(2.0×103)(8.0×109)]=3.98×104Hzf_0=1/[2\pi\sqrt{(2.0\times10^{-3})(8.0\times10^{-9})}]=3.98\times10^4\,\text{Hz}, giving 4.0×104Hz4.0\times10^4\,\text{Hz} to two significant figures.2
02.1
  • Inductance, LL.
In the specified analogy, inductance has the inertia-like role and therefore corresponds to mass.1

Tier 2 · Standard

Mark scheme for 3.13.3.1 Tier 2 · Standard
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01.1
  • 14kHz14\,\text{kHz} and Q=11Q=11
The bandwidth is the full separation of the half-power frequencies: Δf=157143=14kHz\Delta f=157-143=14\,\text{kHz}. Hence Q=f0/Δf=150/14=10.7Q=f_0/\Delta f=150/14=10.7, which is 1111 to two significant figures.3
02.1
  • The capacitance decreases by 36%36\%.
With LL unchanged, f01/Cf_0\propto1/\sqrt{C}, so C2/C1=(f1/f2)2=(180/225)2=0.64C_2/C_1=(f_1/f_2)^2=(180/225)^2=0.64. The new capacitance is 64%64\% of the original value, so it has decreased by 100%64%=36%100\%-64\%=36\%.3
03.1
  • 522kHz522\,\text{kHz}
Since f0=1/(2πLC)f_0=1/(2\pi\sqrt{LC}), the highest frequency occurs when both component values are smallest. Thus Lmin=0.980mHL_{\min}=0.980\,\text{mH} and Cmin=95.0pFC_{\min}=95.0\,\text{pF}. Substitution gives fmax=1/[2π(0.980×103)(95.0×1012)]=5.216×105Hz=522kHzf_{\max}=1/[2\pi\sqrt{(0.980\times10^{-3})(95.0\times10^{-12})}]=5.216\times10^5\,\text{Hz}=522\,\text{kHz} to three significant figures.3

Tier 3 · Hard

Mark scheme for 3.13.3.1 Tier 3 · Hard
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01.1
  • C=88pFC=88\,\text{pF} and Q=28Q=28; the 22kHz22\,\text{kHz} bandwidth passes the full 18kHz18\,\text{kHz} transmission while retaining some selectivity.
Rearrange the resonance equation: C=1/(4π2f02L)C=1/(4\pi^2f_0^2L). Substitution gives C=1/[4π2(620×103)2(0.75×103)]=8.79×1011F=87.9pFC=1/[4\pi^2(620\times10^3)^2(0.75\times10^{-3})]=8.79\times10^{-11}\,\text{F}=87.9\,\text{pF}, or 88pF88\,\text{pF}. The measured bandwidth is Δf=631609=22kHz\Delta f=631-609=22\,\text{kHz}, so Q=620/22=28.228Q=620/22=28.2\approx28. Because 22kHz>18kHz22\,\text{kHz}>18\,\text{kHz}, the full wanted transmission lies within the half-power bandwidth; the response is only 4kHz4\,\text{kHz} wider, so it retains more selectivity than a much broader filter.5
02.1
  • The charged capacitor initially stores electric-field energy. It discharges through the inductor, so current and the inductor's magnetic-field energy increase while the capacitor's energy falls. When the capacitor is momentarily uncharged, current and magnetic energy are maximum. The collapsing magnetic field keeps current flowing and charges the capacitor with reversed polarity, so energy continues to alternate.
Begin with electric-field energy in the charged capacitor and no current. As charge moves, capacitor energy is transferred to the magnetic field of the inductor. At zero capacitor charge the current, and therefore magnetic energy, is greatest. Inductance opposes the change of current, so current persists and recharges the capacitor with the opposite polarity. The sequence then reverses and repeats.4
03.1
  • L=270μHL=270\,\mu\text{H}; use C=310pFC=310\,\text{pF} at 0.55MHz0.55\,\text{MHz} and C=36.6pFC=36.6\,\text{pF} at 1.60MHz1.60\,\text{MHz}.
Rearranging the resonance equation gives L=1/(4π2f02C)L=1/(4\pi^2f_0^2C). To reach 0.55MHz0.55\,\text{MHz} without exceeding 365pF365\,\text{pF} requires L1/[4π2(0.55×106)2(365×1012)]=229μHL\geq1/[4\pi^2(0.55\times10^6)^2(365\times10^{-12})]=229\,\mu\text{H}. To reach 1.60MHz1.60\,\text{MHz} without going below 20pF20\,\text{pF} requires L1/[4π2(1.60×106)2(20×1012)]=495μHL\leq1/[4\pi^2(1.60\times10^6)^2(20\times10^{-12})]=495\,\mu\text{H}. Only 270μH270\,\mu\text{H} lies in this interval. For this inductor, C=1/[4π2(0.55×106)2(270×106)]=310pFC=1/[4\pi^2(0.55\times10^6)^2(270\times10^{-6})]=310\,\text{pF} and C=1/[4π2(1.60×106)2(270×106)]=36.6pFC=1/[4\pi^2(1.60\times10^6)^2(270\times10^{-6})]=36.6\,\text{pF}, both within the available range.5
04.1
  • E=4.90μJE=4.90\,\mu\text{J}; f0=8.90kHzf_0=8.90\,\text{kHz}; 6.0V6.0\,\text{V} when the stored energy has fallen to one quarter.
Initially the capacitor stores E=12CV2=12(68×109)(12)2=4.896×106J=4.90μJE=\tfrac12CV^2=\tfrac12(68\times10^{-9})(12)^2=4.896\times10^{-6}\,\text{J}=4.90\,\mu\text{J}. The resonant frequency is f0=1/[2π(4.7×103)(68×109)]=8902.6Hz=8.90kHzf_0=1/[2\pi\sqrt{(4.7\times10^{-3})(68\times10^{-9})}]=8902.6\,\text{Hz}=8.90\,\text{kHz}. Since E=12CV2E=\tfrac12CV^2, the energy falls to one quarter when the potential difference halves: V=12/2=6.0VV=12/2=6.0\,\text{V}.3
05.1
  • f1=187kHzf_1=187\,\text{kHz} with fB1=2.20kHzf_{B1}=2.20\,\text{kHz}; f2=306kHzf_2=306\,\text{kHz} with fB2=3.60kHzf_{B2}=3.60\,\text{kHz}. The circuit tunes to a higher frequency and has a wider bandwidth in hertz, although its Q-factor is unchanged.
Using f0=1/(2πLC)f_0=1/(2\pi\sqrt{LC}), f1=1/[2π(3.3×103)(220×1012)]=1.86789×105Hz=187kHzf_1=1/[2\pi\sqrt{(3.3\times10^{-3})(220\times10^{-12})}]=1.86789\times10^5\,\text{Hz}=187\,\text{kHz}. Similarly, f2=1/[2π(3.3×103)(82×1012)]=3.05954×105Hz=306kHzf_2=1/[2\pi\sqrt{(3.3\times10^{-3})(82\times10^{-12})}]=3.05954\times10^5\,\text{Hz}=306\,\text{kHz}. Since Q=f0/fBQ=f_0/f_B, fB1=186789/85=2197.5Hz=2.20kHzf_{B1}=186789/85=2197.5\,\text{Hz}=2.20\,\text{kHz} and fB2=305954/85=3599.5Hz=3.60kHzf_{B2}=305954/85=3599.5\,\text{Hz}=3.60\,\text{kHz}. Reducing capacitance raises resonance; unchanged Q means unchanged fractional bandwidth, so the higher-frequency response spans more hertz.4

3.13.3.2 · The ideal operational amplifier

Tier 1 · Easy

Mark scheme for 3.13.3.2 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 0A0\,\text{A}
An ideal operational amplifier has infinite input impedance, so no current enters either input: I+=I=0I_+=I_-=0.1
02.1
  • Infinite.
Infinite open-loop gain is one of the defining characteristics of the ideal operational amplifier.1

Tier 2 · Standard

Mark scheme for 3.13.3.2 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • The inverting input is at approximately 0V0\,\text{V}; it is held at earth potential by negative feedback and very large gain but is not physically connected to earth.
For an ideal op amp operating with negative feedback, the very large open-loop gain makes V+VV_+-V_- negligible. Thus V=V+=0VV_-=V_+=0\,\text{V}. The inverting node is therefore at earth potential, but because it has no direct conducting connection to earth it is described as a virtual earth.3
02.1
  • Approximately 0V0\,\text{V}.
The differential input is V+V=2.102.40=0.30VV_+-V_-=2.10-2.40=-0.30\,\text{V}. The ideal open-loop gain drives the output towards the negative supply for a negative differential input. Here the negative supply rail is 0V0\,\text{V}, so the comparator output is approximately 0V0\,\text{V}.2
03.1
  • 60.0C60.0^\circ\text{C}; connect the sensor to the non-inverting input and the 1.20V1.20\,\text{V} reference to the inverting input.
At the switching point the two input potentials are equal, so T=1.20/(20.0×103)=60.0CT=1.20/(20.0\times10^{-3})=60.0^\circ\text{C}. Connect the rising sensor voltage to V+V_+ and the fixed reference to VV_-. Below 60.0C60.0^\circ\text{C}, V+<VV_+<V_- and the very large open-loop gain drives the output towards 9.0V-9.0\,\text{V}. Above 60.0C60.0^\circ\text{C}, V+>VV_+>V_- and the output is driven towards +9.0V+9.0\,\text{V}.2

Tier 3 · Hard

Mark scheme for 3.13.3.2 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 4.0V-4.0\,\text{V}; this lies within the ±6.0V\pm6.0\,\text{V} rails.
Negative feedback and infinite gain give V=V+=0VV_-=V_+=0\,\text{V}, so the inverting node is a virtual earth. The current from the source to the node is I=(0.800)/(40×103)=20μAI=(0.80-0)/(40\times10^3)=20\,\mu\text{A}. Infinite input impedance means none enters the op amp, so the same current must leave the node through the 200kΩ200\,\text{k}\Omega feedback resistor. Therefore 0Vout=I(200×103)=(20×106)(200×103)=4.0V0-V_{\mathrm{out}}=I(200\times10^3)=(20\times10^{-6})(200\times10^3)=4.0\,\text{V}, giving Vout=4.0VV_{\mathrm{out}}=-4.0\,\text{V}. Since 4.0V-4.0\,\text{V} lies between the 6.0V-6.0\,\text{V} and +6.0V+6.0\,\text{V} rails, the output is not saturated and the linear-feedback assumption is self-consistent.5
02.1
  • 1.799968V<V+<1.800032V1.799968\,\text{V}<V_+<1.800032\,\text{V}; at 1.800020V1.800020\,\text{V}, Vout=+5.0VV_{\mathrm{out}}=+5.0\,\text{V}.
Unsaturated operation requires Vout<8.0V|V_{\mathrm{out}}|<8.0\,\text{V}. From Vout=AOL(V+V)V_{\mathrm{out}}=A_{\mathrm{OL}}(V_+-V_-), V+V<8.0/(2.5×105)=3.2×105V=32μV|V_+-V_-|<8.0/(2.5\times10^5)=3.2\times10^{-5}\,\text{V}=32\,\mu\text{V}. With V=1.800000VV_-=1.800000\,\text{V}, the range is therefore 1.799968V<V+<1.800032V1.799968\,\text{V}<V_+<1.800032\,\text{V}; at either endpoint the calculated output reaches a supply rail and saturation begins. For V+=1.800020VV_+=1.800020\,\text{V}, the differential input is 20μV20\,\mu\text{V} and Vout=(2.5×105)(20×106)=+5.0VV_{\mathrm{out}}=(2.5\times10^5)(20\times10^{-6})=+5.0\,\text{V}, which is inside the supply limits.5
03.1
  • For T<40CT<40^\circ\text{C}: A is 6.0V-6.0\,\text{V} and B is +6.0V+6.0\,\text{V}. For 40C<T<80C40^\circ\text{C}<T<80^\circ\text{C}: both are +6.0V+6.0\,\text{V}. For T>80CT>80^\circ\text{C}: A is +6.0V+6.0\,\text{V} and B is 6.0V-6.0\,\text{V}.
Comparator A changes sign when VS=1.40VV_{\mathrm S}=1.40\,\text{V}, giving T=(1.400.20)/0.030=40CT=(1.40-0.20)/0.030=40^\circ\text{C}. It is positive above this temperature because then V+>VV_+>V_-. Comparator B changes sign when VS=2.60VV_{\mathrm S}=2.60\,\text{V}, giving T=(2.600.20)/0.030=80CT=(2.60-0.20)/0.030=80^\circ\text{C}. It is positive below this temperature because its fixed V+V_+ then exceeds VSV_{\mathrm S} at VV_-. Therefore the output pair (A,B)(A,B) is (6.0,+6.0)V(-6.0,+6.0)\,\text{V} below 40C40^\circ\text{C}, (+6.0,+6.0)V(+6.0,+6.0)\,\text{V} between 40C40^\circ\text{C} and 80C80^\circ\text{C}, and (+6.0,6.0)V(+6.0,-6.0)\,\text{V} above 80C80^\circ\text{C}.4
04.1
  • The output switches positive at 3.50s3.50\,\text{s} and negative at 8.50s8.50\,\text{s}; it is at 7.5V-7.5\,\text{V} before and after these times and at +7.5V+7.5\,\text{V} between them. The positive fraction is 0.4170.417 or 41.7%41.7\%.
On the rising section, equality of the inputs gives 0.50+0.30t=1.550.50+0.30t=1.55, so t=3.50st=3.50\,\text{s}. On the falling section, 4.100.30t=1.554.10-0.30t=1.55, giving t=8.50st=8.50\,\text{s}. The ideal open-loop gain drives the output to positive saturation when V+>VV_+>V_- and to negative saturation when V+<VV_+<V_-. It is therefore positive for 8.503.50=5.00s8.50-3.50=5.00\,\text{s}, a fraction 5.00/12.0=0.4167=41.7%5.00/12.0=0.4167=41.7\%.4
05.1
  • Negative saturation is guaranteed for T<28.5CT<28.5^\circ\text{C} and positive saturation for T>31.5CT>31.5^\circ\text{C}; either output is possible from 28.5C28.5^\circ\text{C} to 31.5C31.5^\circ\text{C}. The ideal input draws no current and therefore does not load the sensor.
  • (accept 28.528.5 to 28.55C28.55^\circ\text{C} and 31.4531.45 to 31.5C31.5^\circ\text{C})
Negative saturation is guaranteed only when even the largest sensor output is below the reference: 0.90+0.055T+0.080<2.550.90+0.055T+0.080<2.55. This gives T<1.57/0.055=28.545CT<1.57/0.055=28.545\ldots^\circ\text{C}, or T<28.5CT<28.5^\circ\text{C}. Positive saturation is guaranteed only when even the smallest output exceeds the reference: 0.90+0.055T0.080>2.550.90+0.055T-0.080>2.55, giving T>1.73/0.055=31.4545CT>1.73/0.055=31.4545\ldots^\circ\text{C}, or T>31.5CT>31.5^\circ\text{C}. Between these limits the uncertainty band crosses 2.55V2.55\,\text{V}, so either rail output is possible. Infinite ideal input resistance means zero input current, so the comparator does not change the sensor output relation.5

3.13.4.1 · Operational amplifier: inverting amplifier configuration

Tier 1 · Easy

Mark scheme for 3.13.4.1 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 2.8V-2.8\,\text{V}
The gain is Rf/Rin=47/10=4.7-R_f/R_{\text{in}}=-47/10=-4.7. Hence Vout=(4.7)(0.60)=2.82VV_{\text{out}}=(-4.7)(0.60)=-2.82\,\text{V}, which is 2.8V-2.8\,\text{V} to two significant figures.2
02.1
  • 7.5-7.5
For an inverting amplifier, G=Rf/RinG=-R_f/R_{\text{in}}. Therefore G=180/24=7.5G=-180/24=-7.5. The negative sign shows that the output is inverted.1

Tier 2 · Standard

Mark scheme for 3.13.4.1 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • +2.6V+2.6\,\text{V}
Negative feedback makes the inverting input a virtual earth, and no current enters the operational amplifier. Therefore Vin/Rin=(0Vout)/RfV_{\text{in}}/R_{\text{in}}=(0-V_{\text{out}})/R_f. Rearranging gives Vout/Vin=Rf/Rin=68/12=5.67V_{\text{out}}/V_{\text{in}}=-R_f/R_{\text{in}}=-68/12=-5.67. Thus Vout=(5.67)(0.45)=+2.55VV_{\text{out}}=(-5.67)(-0.45)=+2.55\,\text{V}, or +2.6V+2.6\,\text{V} to two significant figures.3
02.1
  • 162kΩ162\,\text{k}\Omega
The required gain is G=Vout/Vin=2.52/(0.28)=9.0G=V_{\text{out}}/V_{\text{in}}=2.52/(-0.28)=-9.0. Since G=Rf/RinG=-R_f/R_{\text{in}}, Rf=9.0(18kΩ)=162kΩR_f=9.0(18\,\text{k}\Omega)=162\,\text{k}\Omega.2
03.1
  • 800Ω800\,\Omega
At the current limit, Rf=Vout/Iout=4.00/(0.500×103)=8.00kΩR_f=V_{\text{out}}/I_{\text{out}}=4.00/(0.500\times10^{-3})=8.00\,\text{k}\Omega. Since G=Rf/Rin=10.0|G|=R_f/R_{\text{in}}=10.0, the minimum input resistance is Rin=8.00kΩ/10.0=0.800kΩ=800ΩR_{\text{in}}=8.00\,\text{k}\Omega/10.0=0.800\,\text{k}\Omega=800\,\Omega. A larger resistance pair with the same ratio would draw less output current.2

Tier 3 · Hard

Mark scheme for 3.13.4.1 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Ideal peak 11.2V11.2\,\text{V}; the inverted output is clipped at ±8.0V\pm8.0\,\text{V}; maximum unclipped input peak 1.0V1.0\,\text{V}.
The closed-loop gain is Rf/Rin=120/15=8.0-R_f/R_{\text{in}}=-120/15=-8.0. The ideal output peak is therefore 8.0×1.4=11.2V8.0\times1.4=11.2\,\text{V} and it is inverted relative to the input. Because 11.2V11.2\,\text{V} exceeds both saturation magnitudes, the positive and negative peaks flatten at +8.0V+8.0\,\text{V} and 8.0V-8.0\,\text{V}. At the clipping boundary, 8.0Vin,peak=8.0V8.0|V_{\text{in,peak}}|=8.0\,\text{V}, so the largest unclipped input peak is 1.0V1.0\,\text{V}.5
02.1
  • 3.00V-3.00\,\text{V}
Negative feedback holds the inverting input at virtual-earth potential. The sensor's internal resistance is therefore in series with the amplifier input resistance, so I=0.600/[(4.00+20.0)×103]=25.0μAI=0.600/[(4.00+20.0)\times10^3]=25.0\,\mu\text{A}. No current enters the ideal op amp, hence the same current flows through the feedback resistor. Therefore Vout=IRf=(25.0×106)(120×103)=3.00VV_{\text{out}}=-I R_f=-(25.0\times10^{-6})(120\times10^3)=-3.00\,\text{V}.3
03.1
  • 180kΩ180\,\text{k}\Omega; its worst-case output peak is 4.18V4.18\,\text{V}, whereas the 220kΩ220\,\text{k}\Omega option could produce 5.11V5.11\,\text{V}.
The greatest possible gain magnitude occurs with the feedback resistor 5%5\% high and the input resistor 5%5\% low. For the 180kΩ180\,\text{k}\Omega option, G=(180×1.05)/(20.0×0.95)=9.947|G|=(180\times1.05)/(20.0\times0.95)=9.947\ldots, so the largest output peak is 0.420(9.947)=4.18V0.420(9.947\ldots)=4.18\,\text{V}, below the limit. For 220kΩ220\,\text{k}\Omega, G=(220×1.05)/(20.0×0.95)=12.158|G|=(220\times1.05)/(20.0\times0.95)=12.158\ldots and the possible output peak is 0.420(12.158)=5.11V0.420(12.158\ldots)=5.11\,\text{V}. Therefore only the 180kΩ180\,\text{k}\Omega resistor guarantees an unclipped output.4
04.1
  • RA=104kΩR_A=104\,\text{k}\Omega and RB=144kΩR_B=144\,\text{k}\Omega; output peaks 1.17V1.17\,\text{V} and 2.79V2.79\,\text{V}, both inverted; feedback-current peak 11.25μA11.25\,\mu\text{A} in either setting.
With the switch open, RA/Rin=3.25-R_A/R_{\text{in}}=-3.25, so RA=3.25(32.0kΩ)=104kΩR_A=3.25(32.0\,\text{k}\Omega)=104\,\text{k}\Omega. With the switch closed, (RA+RB)/Rin=7.75-(R_A+R_B)/R_{\text{in}}=-7.75, giving RA+RB=248kΩR_A+R_B=248\,\text{k}\Omega and RB=144kΩR_B=144\,\text{k}\Omega. The output-peak magnitudes are 3.25(0.360)=1.17V3.25(0.360)=1.17\,\text{V} and 7.75(0.360)=2.79V7.75(0.360)=2.79\,\text{V}; both outputs are inverted. The virtual-earth input current is 0.360/(32.0×103)=11.25μA0.360/(32.0\times10^3)=11.25\,\mu\text{A}. No current enters the ideal op amp, so this same peak current flows through whichever feedback resistance is selected.5
05.1
  • Greatest input magnitude 0.950V0.950\,\text{V}; the output-voltage limit sets it, with feedback-resistor power 0.169mW0.169\,\text{mW}.
The gain magnitude is Rf/Rin=192/32.0=6.00R_f/R_{\text{in}}=192/32.0=6.00, so the output limit requires Vin5.70/6.00=0.950V|V_{\text{in}}|\leq5.70/6.00=0.950\,\text{V}. The power limit gives a maximum feedback current I=P/Rf=(0.180×103)/(192×103)=30.62μAI=\sqrt{P/R_f}=\sqrt{(0.180\times10^{-3})/(192\times10^3)}=30.62\ldots\,\mu\text{A}. The same current flows through the input resistor, so this limit permits Vin=IRin=(30.62×106)(32.0×103)=0.9798V|V_{\text{in}}|=I R_{\text{in}}=(30.62\ldots\times10^{-6})(32.0\times10^3)=0.9798\ldots\,\text{V}. The voltage limit is therefore more restrictive. At 0.950V0.950\,\text{V}, I=0.950/(32.0×103)=29.69μAI=0.950/(32.0\times10^3)=29.69\,\mu\text{A} and I2Rf=0.169mWI^2R_f=0.169\,\text{mW}, below the power limit.4

3.13.4.2 · Operational amplifier: non-inverting amplifier configuration

Tier 1 · Easy

Mark scheme for 3.13.4.2 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 3.9V3.9\,\text{V}
The gain is 1+Rf/R1=1+39/10=4.91+R_f/R_1=1+39/10=4.9. Therefore Vout=4.9×0.80=3.92VV_{\text{out}}=4.9\times0.80=3.92\,\text{V}, giving 3.9V3.9\,\text{V} to two significant figures.2
02.1
  • 8.08.0
The non-inverting gain is G=1+Rf/R1=1+105/15=8.0G=1+R_f/R_1=1+105/15=8.0.1

Tier 2 · Standard

Mark scheme for 3.13.4.2 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 2.5V2.5\,\text{V}
No current enters the ideal input, so RfR_f and R1R_1 form an unloaded divider: V=VoutR1/(R1+Rf)V_-=V_{\text{out}}R_1/(R_1+R_f). Negative feedback gives V=V+=VinV_-=V_+=V_{\text{in}}. Hence Vout/Vin=(R1+Rf)/R1=1+Rf/R1V_{\text{out}}/V_{\text{in}}=(R_1+R_f)/R_1=1+R_f/R_1. The gain is 1+33/8.2=5.021+33/8.2=5.02, so Vout=5.02×0.50=2.51VV_{\text{out}}=5.02\times0.50=2.51\,\text{V}, or 2.5V2.5\,\text{V} to two significant figures.4
02.1
  • 84kΩ84\,\text{k}\Omega
The required gain is G=2.00/0.25=8.0G=2.00/0.25=8.0. Using G=1+Rf/R1G=1+R_f/R_1 gives Rf=(G1)R1=(8.01)(12kΩ)=84kΩR_f=(G-1)R_1=(8.0-1)(12\,\text{k}\Omega)=84\,\text{k}\Omega.2
03.1
  • Input potential 1.50V1.50\,\text{V}; divider current 83.3μA83.3\,\mu\text{A}.
The closed-loop gain is G=1+Rf/R1=1+72.0/18.0=5.00G=1+R_f/R_1=1+72.0/18.0=5.00. Hence Vin=7.50/5.00=1.50VV_{\text{in}}=7.50/5.00=1.50\,\text{V}. No current enters the ideal inverting input, so RfR_f and R1R_1 carry the same current. Their series resistance is 90.0kΩ90.0\,\text{k}\Omega, giving I=7.50/(90.0×103)=83.3μAI=7.50/(90.0\times10^3)=83.3\,\mu\text{A}.3

Tier 3 · Hard

Mark scheme for 3.13.4.2 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Maximum input 4.1V peak-to-peak4.1\,\text{V peak-to-peak}; output 23.0V peak-to-peak23.0\,\text{V peak-to-peak}.
The gain is 1+82/18=5.561+82/18=5.56. The largest output peak before saturation is 11.5V11.5\,\text{V}, so the largest input peak is 11.5/5.56=2.07V11.5/5.56=2.07\,\text{V}. A peak-to-peak value is twice a peak value, giving an input of 2(2.07)=4.14V peak-to-peak2(2.07)=4.14\,\text{V peak-to-peak}, or 4.1V peak-to-peak4.1\,\text{V peak-to-peak}. The corresponding output spans from 11.5V-11.5\,\text{V} to +11.5V+11.5\,\text{V}, so it is 23.0V peak-to-peak23.0\,\text{V peak-to-peak}.5
02.1
  • 120kΩ120\,\text{k}\Omega
For Rf=120kΩR_f=120\,\text{k}\Omega, G=1+120/10.0=13.0G=1+120/10.0=13.0, so the output peak is 13.0(0.900)=11.7V13.0(0.900)=11.7\,\text{V}, below saturation. The next value, 140kΩ140\,\text{k}\Omega, gives G=1+140/10.0=15.0G=1+140/10.0=15.0 and an output peak of 15.0(0.900)=13.5V15.0(0.900)=13.5\,\text{V}, which exceeds 13.0V13.0\,\text{V}. Therefore 120kΩ120\,\text{k}\Omega is the greatest available resistance that avoids saturation.3
03.1
  • Ideal values R1=24.0kΩR_1=24.0\,\text{k}\Omega and Rf=156kΩR_f=156\,\text{k}\Omega; select 160kΩ160\,\text{k}\Omega, giving gain 7.677.67 and a 2.22%2.22\% error.
No current enters the ideal op amp, so the divider current flows through both resistors. Their ideal total resistance is R1+Rf=9.00/(50.0×106)=180kΩR_1+R_f=9.00/(50.0\times10^{-6})=180\,\text{k}\Omega. Since G=(R1+Rf)/R1=7.50G=(R_1+R_f)/R_1=7.50, R1=180/7.50=24.0kΩR_1=180/7.50=24.0\,\text{k}\Omega and Rf=18024.0=156kΩR_f=180-24.0=156\,\text{k}\Omega. With Rf=150kΩR_f=150\,\text{k}\Omega, G=1+150/24.0=7.25G=1+150/24.0=7.25; with 160kΩ160\,\text{k}\Omega, G=1+160/24.0=7.666G=1+160/24.0=7.666\ldots, which is closer to 7.507.50. Its percentage gain error is (7.6667.50)/7.50×100%=2.22%(7.666\ldots-7.50)/7.50\times100\%=2.22\%.4
04.1
  • Each Rf=112kΩR_f=112\,\text{k}\Omega; intermediate peak 0.600V0.600\,\text{V}; ideal final peak 4.80V4.80\,\text{V}; actual final peak 4.50V4.50\,\text{V}.
Identical stages have equal gains, so each gain is 64.0=8.00\sqrt{64.0}=8.00. From G=1+Rf/R1G=1+R_f/R_1, Rf=(8.001)(16.0kΩ)=112kΩR_f=(8.00-1)(16.0\,\text{k}\Omega)=112\,\text{k}\Omega. The first-stage peak is 8.00(75.0mV)=0.600V8.00(75.0\,\text{mV})=0.600\,\text{V}, within its output limit. The ideal second-stage peak is 8.00(0.600)=4.80V8.00(0.600)=4.80\,\text{V}. This exceeds the second amplifier's 4.50V4.50\,\text{V} limit, so its actual peak is clipped at 4.50V4.50\,\text{V}.5
05.1
  • The gain is 7.507.50, the output peak is 5.40V5.40\,\text{V} and the smallest supply rails are ±6.25V\pm6.25\,\text{V}.
The closed-loop gain is G=1+Rf/R1=1+91.0/14.0=7.50G=1+R_f/R_1=1+91.0/14.0=7.50. The required output peak is therefore 7.50(0.720)=5.40V7.50(0.720)=5.40\,\text{V}. Because the output must remain at least 0.850V0.850\,\text{V} inside each rail, the minimum rail magnitude is 5.40+0.850=6.25V5.40+0.850=6.25\,\text{V}. Hence the smallest symmetrical supply is ±6.25V\pm6.25\,\text{V}.3

3.13.4.3 · Operational amplifier: summing amplifier configuration

Tier 1 · Easy

Mark scheme for 3.13.4.3 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 1.6V-1.6\,\text{V}
Use Vout=Rf(V1/R1+V2/R2)V_{\text{out}}=-R_f(V_1/R_1+V_2/R_2). Thus Vout=20(0.30/10+0.50/10)=1.6VV_{\text{out}}=-20(0.30/10+0.50/10)=-1.6\,\text{V} when all resistances are in kΩ\text{k}\Omega.2
02.1
  • 2.7V2.7\,\text{V}
Using the supplied relation, Vout=(0.700.25)(6.0)=2.70VV_{\text{out}}=(0.70-0.25)(6.0)=2.70\,\text{V}, or 2.7V2.7\,\text{V}.1

Tier 2 · Standard

Mark scheme for 3.13.4.3 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 2.7V-2.7\,\text{V}
The input-current terms are 0.90/15=0.0600.90/15=0.060, 1.20/30=0.040-1.20/30=-0.040 and 0.50/20=0.0250.50/20=0.025 in consistent units. Their algebraic sum is 0.0450.045. Therefore Vout=60(0.045)=2.70VV_{\text{out}}=-60(0.045)=-2.70\,\text{V}, or 2.7V-2.7\,\text{V}.3
02.1
  • 0.30V-0.30\,\text{V}
Use 0.60=90(0.40/30+V2/45)-0.60=-90(0.40/30+V_2/45) with resistances in kΩ\text{k}\Omega. Dividing by 90-90 gives 0.006667=0.013333+V2/450.006667=0.013333+V_2/45. Hence V2/45=0.006667V_2/45=-0.006667 and V2=0.300VV_2=-0.300\,\text{V}.2
03.1
  • V1=1.0VV_1=-1.0\,\text{V}, V2=0VV_2=0\,\text{V} and V3=1.0VV_3=-1.0\,\text{V}.
When active, the three inputs contribute 40(1.0)/10=+4.0V-40(-1.0)/10=+4.0\,\text{V}, 40(1.0)/20=+2.0V-40(-1.0)/20=+2.0\,\text{V} and 40(1.0)/40=+1.0V-40(-1.0)/40=+1.0\,\text{V} to the output. The unique combination giving +5.0V+5.0\,\text{V} is 4.0+1.04.0+1.0, so the first and third inputs are at 1.0V-1.0\,\text{V} and the second is at 0V0\,\text{V}.3

Tier 3 · Hard

Mark scheme for 3.13.4.3 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Ideal output 15.5V-15.5\,\text{V}; actual output 10.5V-10.5\,\text{V}; third input 0.50V0.50\,\text{V}.
The first two current terms are 1.20/12=0.1001.20/12=0.100 and 0.60/30=0.020-0.60/30=-0.020 in consistent units; the third is 1.50/20=0.0751.50/20=0.075. Hence Vout,ideal=100(0.1000.020+0.075)=15.5VV_{\text{out,ideal}}=-100(0.100-0.020+0.075)=-15.5\,\text{V}. The output therefore saturates at 10.5V-10.5\,\text{V}. At the boundary the current-term sum must be 10.5/100=0.10510.5/100=0.105. If the reduced third input is V3V_3, then 0.1000.020+V3/20=0.1050.100-0.020+V_3/20=0.105, so V3/20=0.025V_3/20=0.025 and V3=0.50VV_3=0.50\,\text{V}.6
02.1
  • R1=30kΩR_1=30\,\text{k}\Omega and R2=20kΩR_2=20\,\text{k}\Omega
For channel 1 alone, 2.00=120(0.50/R1)-2.00=-120(0.50/R_1), so R1=120(0.50)/2.00=30kΩR_1=120(0.50)/2.00=30\,\text{k}\Omega. The second channel changes the output by +1.20V+1.20\,\text{V}. Its contribution is RfV2/R2=120(0.20)/R2=24/R2-R_fV_2/R_2=-120(-0.20)/R_2=24/R_2. Therefore 24/R2=1.2024/R_2=1.20, giving R2=20kΩR_2=20\,\text{k}\Omega.3
03.1
  • RA=18.0kΩR_A=18.0\,\text{k}\Omega and RB=72.0kΩR_B=72.0\,\text{k}\Omega
The two maximum-input contributions must add to 9.00V9.00\,\text{V} in the ratio 2:12:1, so sensor AA must contribute 6.00V6.00\,\text{V} and sensor BB must contribute 3.00V3.00\,\text{V}. For sensor AA, RfVA/RA=6.00R_fV_A/R_A=6.00, giving RA=180(0.600)/6.00=18.0kΩR_A=180(0.600)/6.00=18.0\,\text{k}\Omega. For sensor BB, RfVB/RB=3.00R_fV_B/R_B=3.00, giving RB=180(1.20)/3.00=72.0kΩR_B=180(1.20)/3.00=72.0\,\text{k}\Omega. Both inputs are positive, so the summed output at maximum input is (6.00+3.00)=9.00V-(6.00+3.00)=-9.00\,\text{V}.4
04.1
  • Input resistances 40.0kΩ40.0\,\text{k}\Omega, 80.0kΩ80.0\,\text{k}\Omega, 160kΩ160\,\text{k}\Omega and 320kΩ320\,\text{k}\Omega from MSB to LSB; first saturating code 11001100.
The LSB must contribute 0.400V-0.400\,\text{V} when high, so its resistance is RLSB=Rf(0.800/0.400)=320kΩR_{\text{LSB}}=R_f(0.800/0.400)=320\,\text{k}\Omega. Binary weighting requires contributions of 0.800V0.800\,\text{V}, 1.60V1.60\,\text{V} and 3.20V3.20\,\text{V} for the next bits, giving resistances 160kΩ160\,\text{k}\Omega, 80.0kΩ80.0\,\text{k}\Omega and 40.0kΩ40.0\,\text{k}\Omega, respectively. A code of decimal value nn has ideal output 0.400nV-0.400n\,\text{V}. Code 10111011 gives 4.40V-4.40\,\text{V} and remains unclipped, whereas the next code, 11001100, requires 4.80V-4.80\,\text{V} and is the first to saturate.5
05.1
  • Sensor input resistance 12.0kΩ12.0\,\text{k}\Omega; reference input resistance 15.0kΩ15.0\,\text{k}\Omega.
For Vout=Rf(Vs/Rs+Vr/Rr)V_{\text{out}}=-R_f(V_s/R_s+V_r/R_r), the required output slope is [6.00(+6.00)]/(1.000.200)=15.0[-6.00-(+6.00)]/(1.00-0.200)=-15.0. Hence Rf/Rs=15.0-R_f/R_s=-15.0 and Rs=180/15.0=12.0kΩR_s=180/15.0=12.0\,\text{k}\Omega. At Vs=0.200VV_s=0.200\,\text{V}, 6.00=180[0.200/12.00.750/Rr]6.00=-180[0.200/12.0-0.750/R_r], with resistances in kΩ\text{k}\Omega. Thus the bracket is 0.033333-0.033333\ldots, so 0.750/Rr=0.0500000.750/R_r=0.050000\ldots and Rr=15.0kΩR_r=15.0\,\text{k}\Omega. Checking the other endpoint gives 180[1.00/12.00.750/15.0]=6.00V-180[1.00/12.0-0.750/15.0]=-6.00\,\text{V}.5

3.13.4.4 · Real operational amplifiers

Tier 1 · Easy

Mark scheme for 3.13.4.4 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 1.0×105Hz1.0\times10^5\,\text{Hz}
Using GfB=3.0×106HzGf_B=3.0\times10^6\,\text{Hz}, the bandwidth is fB=(3.0×106)/30=1.0×105Hzf_B=(3.0\times10^6)/30=1.0\times10^5\,\text{Hz}.2
02.1
  • Any two from: finite open-loop gain; finite input resistance; limited output voltage; limited output current; gain that falls at high frequency.
A real device does not have infinite gain or input resistance. Its output voltage and current are bounded by the device and supply, and its gain decreases as signal frequency rises. Any two distinct limitations score.2

Tier 2 · Standard

Mark scheme for 3.13.4.4 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • No; the required slew rate is 2.0Vμs12.0\,\text{V}\,\mu\text{s}^{-1} and the maximum frequency is 60kHz60\,\text{kHz}.
For a sine wave, the maximum gradient is 2πfVp=2π(80×103)(4.0)=2.01×106V s1=2.01Vμs12\pi fV_p=2\pi(80\times10^3)(4.0)=2.01\times10^6\,\text{V s}^{-1}=2.01\,\text{V}\,\mu\text{s}^{-1}. This exceeds 1.5Vμs11.5\,\text{V}\,\mu\text{s}^{-1}, so slew-rate distortion occurs. The limiting frequency is f=SR/(2πVp)=(1.5×106)/(2π×4.0)=5.97×104Hzf=\text{SR}/(2\pi V_p)=(1.5\times10^6)/(2\pi\times4.0)=5.97\times10^4\,\text{Hz}, or 60kHz60\,\text{kHz} to two significant figures.4
02.1
  • The greatest usable gain is 4040; a gain of 6060 is unsuitable because its bandwidth would be only 30kHz30\,\text{kHz}.
Using GfB=1.8×106HzGf_B=1.8\times10^6\,\text{Hz} gives G=(1.8×106)/(45×103)=40G=(1.8\times10^6)/(45\times10^3)=40. At gain 6060, the bandwidth would be (1.8×106)/60=30kHz(1.8\times10^6)/60=30\,\text{kHz}, which is below 45kHz45\,\text{kHz}, so gain 6060 is unsuitable.2
03.1
  • Actual output 6.40V6.40\,\text{V}; 20.0%20.0\% below the ideal output.
The finite input resistance loads the source, so the amplifier input is 0.800[800/(200+800)]=0.640V0.800[800/(200+800)]=0.640\,\text{V}. The actual output is 10.0(0.640)=6.40V10.0(0.640)=6.40\,\text{V}. With infinite input resistance the input would be 0.800V0.800\,\text{V} and the output 8.00V8.00\,\text{V}. The reduction is (8.006.40)/8.00×100%=20.0%(8.00-6.40)/8.00\times100\%=20.0\%.3

Tier 3 · Hard

Mark scheme for 3.13.4.4 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • The 160kHz160\,\text{kHz} bandwidth is sufficient, but the required 1.1Vμs11.1\,\text{V}\,\mu\text{s}^{-1} exceeds the slew rate; maximum undistorted peak 2.1V2.1\,\text{V}.
The closed-loop bandwidth is (4.0×106)/25=1.60×105Hz=160kHz(4.0\times10^6)/25=1.60\times10^5\,\text{Hz}=160\,\text{kHz}, so 60kHz60\,\text{kHz} is inside the small-signal bandwidth. The required slew rate is 2πfVp=2π(60×103)(3.0)=1.13×106V s1=1.13Vμs12\pi fV_p=2\pi(60\times10^3)(3.0)=1.13\times10^6\,\text{V s}^{-1}=1.13\,\text{V}\,\mu\text{s}^{-1}, which exceeds the available rate. Slew rate is therefore the active limitation. Rearranging gives Vp,max=SR/(2πf)=(0.80×106)/(2π×60×103)=2.12VV_{p,\max}=\text{SR}/(2\pi f)=(0.80\times10^6)/(2\pi\times60\times10^3)=2.12\,\text{V}, or 2.1V2.1\,\text{V}.6
02.1
  • Op amp B only. A has bandwidth 60kHz60\,\text{kHz}, whereas B has bandwidth 150kHz150\,\text{kHz} and its required output peak is 7.20V7.20\,\text{V}, below the 8.0V8.0\,\text{V} limit.
At gain 4040, op amp A has bandwidth (2.4×106)/40=60kHz(2.4\times10^6)/40=60\,\text{kHz}, so it cannot amplify the 100kHz100\,\text{kHz} signal faithfully. Op amp B has bandwidth (6.0×106)/40=150kHz(6.0\times10^6)/40=150\,\text{kHz}, which is sufficient. Its required output peak is 40(0.180)=7.20V40(0.180)=7.20\,\text{V}, below the 8.0V8.0\,\text{V} output limit, so B is suitable.3
03.1
  • Greatest gain 2525; the output peak is 3.75V3.75\,\text{V}, output current 7.98mA7.98\,\text{mA} and bandwidth 144kHz144\,\text{kHz}.
The output-voltage limit gives G9.00/0.150=60.0G\leq9.00/0.150=60.0. The bandwidth condition gives G(3.60×106)/(80.0×103)=45.0G\leq(3.60\times10^6)/(80.0\times10^3)=45.0. The current limit requires G(0.150)/4708.00×103G(0.150)/470\leq8.00\times10^{-3}, so G25.066G\leq25.066\ldots. The greatest permitted whole number is therefore 2525. At this gain, Vout,peak=25(0.150)=3.75VV_{\text{out,peak}}=25(0.150)=3.75\,\text{V}, Ipeak=3.75/470=7.98mAI_{\text{peak}}=3.75/470=7.98\,\text{mA} and the bandwidth is (3.60×106)/25=144kHz(3.60\times10^6)/25=144\,\text{kHz}. A gain of 2626 would require 8.30mA8.30\,\text{mA}, so it is not allowed.4
04.1
  • The first two pairs both give 4.00MHz4.00\,\text{MHz}; the gain-125125 measurement is anomalous and its predicted bandwidth is 32.0kHz32.0\,\text{kHz}.
The first pair gives 25.0(160kHz)=4.00MHz25.0(160\,\text{kHz})=4.00\,\text{MHz} and the second gives 80.0(50.0kHz)=4.00MHz80.0(50.0\,\text{kHz})=4.00\,\text{MHz}, so they are mutually consistent. The third measured product is 125(28.0kHz)=3.50MHz125(28.0\,\text{kHz})=3.50\,\text{MHz}, so that pair is anomalous. Using the supported product, its predicted bandwidth is (4.00×106)/125=3.20×104Hz=32.0kHz(4.00\times10^6)/125=3.20\times10^4\,\text{Hz}=32.0\,\text{kHz}.4
05.1
  • Minimum three stages; each has gain 10.010.0, bandwidth 210kHz210\,\text{kHz} and feedback resistance 135kΩ135\,\text{k}\Omega.
The bandwidth requirement limits each stage gain to (2.10×106)/(75.0×103)=28.0(2.10\times10^6)/(75.0\times10^3)=28.0. With two identical stages, each would need gain 1000=31.62\sqrt{1000}=31.62\ldots, which exceeds this limit. Three identical stages each need gain 10003=10.0\sqrt[3]{1000}=10.0, so each has bandwidth (2.10×106)/10.0=210kHz(2.10\times10^6)/10.0=210\,\text{kHz} and the signal is passed. For a non-inverting stage, Rf=(G1)R1=(10.01)(15.0kΩ)=135kΩR_f=(G-1)R_1=(10.0-1)(15.0\,\text{k}\Omega)=135\,\text{k}\Omega.5

3.13.5.1 · Combinational logic

Tier 1 · Easy

Mark scheme for 3.13.5.1 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 0,0,1,00,0,1,0
When A=0A=0, the AND output is 00 for both values of BB. For AB=10AB=10, both AA and B\overline{B} are 11, so Y=1Y=1. For AB=11AB=11, B=0\overline{B}=0, so Y=0Y=0. The ordered outputs are therefore 0,0,1,00,0,1,0.2
02.1
  • NOR gate
A+BA+B is the output of an OR gate. The overline inverts that complete output, and an inverted OR function is a NOR gate.1

Tier 2 · Standard

Mark scheme for 3.13.5.1 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • EOR gate; Y=AB+ABY=\overline{A}B+A\overline{B}.
The output is 11 exactly when the inputs differ, which defines EOR. The row 0101 is selected by AB\overline{A}B and the row 1010 by ABA\overline{B}. OR combines the two mutually exclusive cases, giving Y=AB+ABY=\overline{A}B+A\overline{B}.3
02.1
  • Y=C(A+B)Y=C(A+B); OR AA with BB, then AND the result with CC.
Every output-11 row has C=1C=1. Among the rows with C=1C=1, the output is 00 only when both AA and BB are 00. Therefore Y=C(A+B)Y=C(A+B). A minimal network uses one OR gate for A+BA+B followed by one AND gate with CC.2
03.1
  • Y=ABC+ABC+ABCY=A\overline{B}\overline{C}+\overline{A}B\overline{C}+\overline{A}\overline{B}C; form the three terms with NOT and AND gates, then OR them.
The three accepted input states are 100100, 010010 and 001001. They are selected by ABCA\overline{B}\overline{C}, ABC\overline{A}B\overline{C} and ABC\overline{A}\overline{B}C, respectively. OR combines these mutually exclusive terms, giving Y=ABC+ABC+ABCY=A\overline{B}\overline{C}+\overline{A}B\overline{C}+\overline{A}\overline{B}C. Invert each input as required, form the three products with AND gates, then feed them to an OR gate.2

Tier 3 · Hard

Mark scheme for 3.13.5.1 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Outputs 0,0,1,0,1,0,1,00,0,1,0,1,0,1,0. A NAND-only construction is P=A NANDAP=A\operatorname{\ NAND}A, Q=B NANDBQ=B\operatorname{\ NAND}B, R=P NANDQR=P\operatorname{\ NAND}Q, S=C NANDCS=C\operatorname{\ NAND}C, T=R NANDST=R\operatorname{\ NAND}S, Y=T NANDTY=T\operatorname{\ NAND}T.
The factor C\overline{C} makes every row with C=1C=1 give Y=0Y=0. When C=0C=0, the output equals A+BA+B, giving 0,1,1,10,1,1,1 for AB=00,01,10,11AB=00,01,10,11. In the stated row order the outputs are 0,0,1,0,1,0,1,00,0,1,0,1,0,1,0. For NAND-only logic, PP and QQ invert AA and BB. Then R=AB=A+BR=\overline{\overline{A}\cdot\overline{B}}=A+B by De Morgan's law. S=CS=\overline{C}. The gate producing TT forms RS\overline{R\cdot S}, and the final self-connected NAND inverts it, so Y=RS=(A+B)CY=R\cdot S=(A+B)\overline{C}.6
02.1
  • Q=ABACQ=\overline{\overline{AB}\cdot\overline{AC}}; three NAND gates.
Use one NAND gate to produce AB\overline{AB} and a second to produce AC\overline{AC}. NANDing those outputs gives ABAC=AB+AC\overline{\overline{AB}\cdot\overline{AC}}=AB+AC by De Morgan's law, so three NAND gates are required.2
03.1
  • The YY values are 0,1,1,0,1,0,0,10,1,1,0,1,0,0,1; Y=A EORB EORCY=A\operatorname{\ EOR}B\operatorname{\ EOR}C.
First evaluate X=A EORBX=A\operatorname{\ EOR}B, then compare XX with CC. This gives Y=0,1,1,0,1,0,0,1Y=0,1,1,0,1,0,0,1 for the stated row order. EOR is associative, so (A EORB) EORC=A EORB EORC(A\operatorname{\ EOR}B)\operatorname{\ EOR}C=A\operatorname{\ EOR}B\operatorname{\ EOR}C. The output is therefore 11 exactly when an odd number of the three inputs is 11.3
04.1
  • Y=AC+(A EORC)BDY=A\overline{C}+\overline{(A\operatorname{\ EOR}C)}B\overline{D}.
If the most significant bits differ, X>ZX>Z exactly when A=1A=1 and C=0C=0, giving ACA\overline C. If A=CA=C, the lower bits decide the comparison and require B=1B=1, D=0D=0. Equality of AA and CC is (A EORC)\overline{(A\operatorname{\ EOR}C)}, so this case is (A EORC)BD\overline{(A\operatorname{\ EOR}C)}B\overline D. OR combines the mutually exclusive cases.3
05.1
  • Y=D0S1S0+D1S1S0+D2S1S0+D3S1S0Y=D_0\overline{S_1}\overline{S_0}+D_1\overline{S_1}S_0+D_2S_1\overline{S_0}+D_3S_1S_0; with the stated data inputs, one EOR gate gives Y=S1 EORS0Y=S_1\operatorname{\ EOR}S_0.
Each selector state enables one data input. The four selecting terms are therefore D0S1S0D_0\overline{S_1}\overline{S_0}, D1S1S0D_1\overline{S_1}S_0, D2S1S0D_2S_1\overline{S_0} and D3S1S0D_3S_1S_0, and OR combines them. With data pattern 0,1,1,00,1,1,0, the output is 11 for selector states 0101 and 1010 only. Those are exactly the states in which S1S_1 and S0S_0 differ, so a single EOR gate is equivalent.4

3.13.5.2 · Sequential logic

Tier 1 · Easy

Mark scheme for 3.13.5.2 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 101101
The counter advances once per pulse: 000001010011100101000\to001\to010\to011\to100\to101. After five pulses its decimal count is 55, which is binary 101101.2
02.1
  • 00110011
BCD counts decimal digits and returns to 00000000 after 10011001. Starting at decimal 77, six pulses give 8,9,0,1,2,38,9,0,1,2,3. Decimal 33 is 00110011 in BCD.2

Tier 2 · Standard

Mark scheme for 3.13.5.2 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Johnson counter: 88 states; BCD counter: 1010 states; BCD cycle rate 120Hz120\,\text{Hz}.
An nn-stage Johnson counter has 2n2n states, so four stages give 88. BCD represents decimal digits 00 to 99, so it has 1010 states. One full BCD cycle requires 1010 clock pulses, hence the cycle rate is 1.20×103/10=120Hz1.20\times10^3/10=120\,\text{Hz}.4
02.1
  • Count down; next output 00100010.
The outputs represent decimal 55, 44 and 33, so the control input is set to count down. The next state is decimal 22, written as four bits as 00100010.2
03.1
  • 10101010
The initial state 11011101 is decimal 1313. Seven upward counts give 13+7=2013+7=20, which wraps modulo 1616 to decimal 44, or 01000100. Ten downward counts then give 410=64-10=-6, which wraps modulo 1616 to decimal 1010. Decimal 1010 is 10101010 in four-bit binary.2

Tier 3 · Hard

Mark scheme for 3.13.5.2 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Reset on 110110; sequence 000,001,010,011,100,101000,001,010,011,100,101; after 5353 pulses the output is 101101; cycle rate 4.0kHz4.0\,\text{kHz}.
Modulo 66 requires six stable states representing decimal 00 to 55. Decode the next state, decimal 6=1106=110, and use it to reset immediately to 000000. The stable sequence is therefore 000,001,010,011,100,101000,001,010,011,100,101 and then back to 000000. Since 53=8×6+553=8\times6+5, the state after 5353 pulses is the state five steps after reset, 101101. Each cycle uses six pulses, so its repetition rate is (24×103)/6=4.0×103Hz=4.0kHz(24\times10^3)/6=4.0\times10^3\,\text{Hz}=4.0\,\text{kHz}.6
02.1
  • 01110111
Applying the stated complemented feedback and shift rule gives 0000100011001110111101110011000100000000\to1000\to1100\to1110\to1111\to0111\to0011\to0001\to0000. The cycle has eight states. Since 37=4×8+537=4\times8+5, the required state is five steps after 00000000, which is 01110111.4
03.1
  • States 00000,10000,11000,11100,11110,11111,01111,00111,00011,0000100000,10000,11000,11100,11110,11111,01111,00111,00011,00001; YY repeats as 0,1,1,0,00,1,1,0,0; frequency 6.00kHz6.00\,\text{kHz}.
The register advances through 000001000011000111001111011111011110011100011000010000000000\to10000\to11000\to11100\to11110\to11111\to01111\to00111\to00011\to00001\to00000. Evaluating Q4 EORQ2Q_4\operatorname{\ EOR}Q_2 gives 0,1,1,0,0,0,1,1,0,00,1,1,0,0,0,1,1,0,0, which is two repetitions of 0,1,1,0,00,1,1,0,0. Thus one output cycle lasts five clock periods and fY=30.0kHz/5=6.00kHzf_Y=30.0\,\text{kHz}/5=6.00\,\text{kHz}.3
04.1
  • fQ0=800kHzf_{Q_0}=800\,\text{kHz}, fQ3=100kHzf_{Q_3}=100\,\text{kHz}; counter output 10111011.
Q0Q_0 changes state on every clock pulse, so one complete Q0Q_0 cycle takes two pulses and fQ0=1.60MHz/2=800kHzf_{Q_0}=1.60\,\text{MHz}/2=800\,\text{kHz}. The most significant output Q3Q_3 completes one cycle every 1616 pulses, so fQ3=1.60MHz/16=100kHzf_{Q_3}=1.60\,\text{MHz}/16=100\,\text{kHz}. A four-bit counter repeats every 1616 pulses. Since 2027=126(16)+112027=126(16)+11, its state is decimal 1111, or 10111011.4
05.1
  • The tens counter receives 1414 pulses; final display 0505; tens output 00000000 and units output 01010101; pattern rate 25.0Hz25.0\,\text{Hz}.
The units digit starts at 22 and passes from 00 to 99 on pulses 3,13,23,,1333,13,23,\ldots,133, so the tens counter receives 1414 pulses. Equivalently, 42137=9542-137=-95, which is 55 modulo 100100, giving display 0505. Decimal 00 and 55 are 00000000 and 01010101 in BCD. The complete two-counter sequence contains 100100 states, so its repetition rate is (2.50×103)/100=25.0Hz(2.50\times10^3)/100=25.0\,\text{Hz}.5

3.13.5.3 · Astables

Tier 1 · Easy

Mark scheme for 3.13.5.3 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 400Hz400\,\text{Hz}; 40%40\%
The frequency is f=1/T=1/(2.5×103)=400Hzf=1/T=1/(2.5\times10^{-3})=400\,\text{Hz}. The duty cycle is (1.0/2.5)×100%=40%(1.0/2.5)\times100\%=40\%.2
02.1
  • 0.32ms0.32\,\text{ms}
The period is T=1/f=1/(2.0×103)=5.0×104s=0.50msT=1/f=1/(2.0\times10^3)=5.0\times10^{-4}\,\text{s}=0.50\,\text{ms}. Therefore tlow=0.500.18=0.32mst_{\text{low}}=0.50-0.18=0.32\,\text{ms}.2

Tier 2 · Standard

Mark scheme for 3.13.5.3 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 1.43ms1.43\,\text{ms}; 698Hz698\,\text{Hz}
During charging, V=VS(VSV0)et/RCV=V_S-(V_S-V_0)e^{-t/RC}. With V0=VS/3V_0=V_S/3 and V=2VS/3V=2V_S/3, 1/3=(2/3)et/RC1/3=(2/3)e^{-t/RC}, so et/RC=1/2e^{-t/RC}=1/2 and t=RCln2t=RC\ln2. The discharge over the reverse interval has the same duration, so T=2RCln2=2(47×103)(22×109)ln2=1.433×103sT=2RC\ln2=2(47\times10^3)(22\times10^{-9})\ln2=1.433\times10^{-3}\,\text{s}. Hence f=1/T=697.8Hzf=1/T=697.8\,\text{Hz}, giving 1.43ms1.43\,\text{ms} and 698Hz698\,\text{Hz}.4
02.1
  • 42nF42\,\text{nF}
Since T=1/fT=1/f, C=1/(1.4Rf)C=1/(1.4Rf). Thus C=1/[1.4(68×103)(250)]=4.20×108F=42nFC=1/[1.4(68\times10^3)(250)]=4.20\times10^{-8}\,\text{F}=42\,\text{nF} to two significant figures.2
03.1
  • New resistance 60.9kΩ60.9\,\text{k}\Omega; increase 8.70%8.70\%.
Because f=1/(1.4RC)f=1/(1.4RC) and CC is unchanged, resistance is inversely proportional to frequency. The new frequency is 0.92000.9200 of its initial value, so Rnew=56.0/0.9200=60.87kΩR_{\text{new}}=56.0/0.9200=60.87\,\text{k}\Omega, or 60.9kΩ60.9\,\text{k}\Omega. The percentage increase is (60.8756.0)/56.0×100%=8.70%(60.87-56.0)/56.0\times100\%=8.70\%.2

Tier 3 · Hard

Mark scheme for 3.13.5.3 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • thigh=0.85mst_{\text{high}}=0.85\,\text{ms}, tlow=0.34mst_{\text{low}}=0.34\,\text{ms}, f=8.4×102Hzf=8.4\times10^2\,\text{Hz}, duty cycle 71%71\%, mark-to-space ratio 2.5:12.5:1.
The high interval is the charge time: thigh=(82×103)(15×109)ln2=8.53×104s=0.853mst_{\text{high}}=(82\times10^3)(15\times10^{-9})\ln2=8.53\times10^{-4}\,\text{s}=0.853\,\text{ms}. The low interval is tlow=(33×103)(15×109)ln2=3.43×104s=0.343mst_{\text{low}}=(33\times10^3)(15\times10^{-9})\ln2=3.43\times10^{-4}\,\text{s}=0.343\,\text{ms}. Thus T=1.196msT=1.196\,\text{ms} and f=1/T=836Hzf=1/T=836\,\text{Hz}, or 8.4×102Hz8.4\times10^2\,\text{Hz}. The duty cycle is 0.853/1.196×100%=71.3%0.853/1.196\times100\%=71.3\%, or 71%71\%. The mark-to-space ratio is 0.853:0.343=2.48:10.853:0.343=2.48:1, or 2.5:12.5:1.6
02.1
  • R1=6.80kΩR_1=6.80\,\text{k}\Omega and R2=13.6kΩR_2=13.6\,\text{k}\Omega
The period is T=1/(3.50×103)=285.714μsT=1/(3.50\times10^3)=285.714\ldots\,\mu\text{s}. Hence thigh=0.600T=171.429μst_{\text{high}}=0.600T=171.429\ldots\,\mu\text{s} and tlow=0.400T=114.286μst_{\text{low}}=0.400T=114.286\ldots\,\mu\text{s}. Therefore R2=tlow/(0.7C)=13.605kΩR_2=t_{\text{low}}/(0.7C)=13.605\ldots\,\text{k}\Omega. Also R1+R2=thigh/(0.7C)=20.408kΩR_1+R_2=t_{\text{high}}/(0.7C)=20.408\ldots\,\text{k}\Omega, so R1=6.8027kΩR_1=6.8027\ldots\,\text{k}\Omega. To three significant figures, R1=6.80kΩR_1=6.80\,\text{k}\Omega and R2=13.6kΩR_2=13.6\,\text{k}\Omega.2
03.1
  • Frequency 847.7Hz847.7\,\text{Hz} to 1145.2Hz1145.2\,\text{Hz} (848Hz848\,\text{Hz} to 1.15kHz1.15\,\text{kHz}, 33 s.f.); duty cycle 84.0%84.0\% to 86.1%86.1\% (both to 33 s.f.).
The lowest frequency uses all maximum component values: Tmax=0.7[(48.846+2(10.395))×103](24.2×109)=1.17963msT_{\max}=0.7[(48.846+2(10.395))\times10^3](24.2\times10^{-9})=1.17963\,\text{ms}, so fmin=847.7Hzf_{\min}=847.7\,\text{Hz}. The highest frequency uses all minimum values: Tmin=0.7[(44.194+2(9.405))×103](19.8×109)=0.87324msT_{\min}=0.7[(44.194+2(9.405))\times10^3](19.8\times10^{-9})=0.87324\,\text{ms}, so fmax=1145.2Hzf_{\max}=1145.2\,\text{Hz}. Duty cycle is (R1+R2)/(R1+2R2)(R_1+R_2)/(R_1+2R_2), independent of CC. It is smallest for R1=44.194kΩR_1=44.194\,\text{k}\Omega and R2=10.395kΩR_2=10.395\,\text{k}\Omega, giving 84.0038%84.0038\%, and largest for R1=48.846kΩR_1=48.846\,\text{k}\Omega and R2=9.405kΩR_2=9.405\,\text{k}\Omega, giving 86.0988%86.0988\%.4
04.1
  • Lower temperature: 2.04kHz2.04\,\text{kHz} and 71.4%71.4\%; higher temperature: 2.86kHz2.86\,\text{kHz} and 60.0%60.0\%. The lower thermistor resistance shortens only the high interval, so frequency rises and duty cycle falls.
At the lower temperature, thigh=0.7(50.0×103)(10.0×109)=350μst_{\text{high}}=0.7(50.0\times10^3)(10.0\times10^{-9})=350\,\mu\text{s} and tlow=0.7(20.0×103)(10.0×109)=140μst_{\text{low}}=0.7(20.0\times10^3)(10.0\times10^{-9})=140\,\mu\text{s}. Thus T=490μsT=490\,\mu\text{s}, f=1/T=2.041kHzf=1/T=2.041\ldots\,\text{kHz} and duty cycle =350/490×100%=71.43%=350/490\times100\%=71.43\ldots\%. At the higher temperature, thigh=0.7(30.0×103)(10.0×109)=210μst_{\text{high}}=0.7(30.0\times10^3)(10.0\times10^{-9})=210\,\mu\text{s} while tlowt_{\text{low}} remains 140μs140\,\mu\text{s}. Therefore T=350μsT=350\,\mu\text{s}, f=2.857kHzf=2.857\ldots\,\text{kHz} and duty cycle =210/350×100%=60.0%=210/350\times100\%=60.0\%. Only the high-time resistance contains RTR_T, so its decrease produces both trends.5
05.1
  • Initial frequency 2.04kHz2.04\,\text{kHz} and average power 0.257W0.257\,\text{W}, so the limit is exceeded; greatest R1=10.0kΩR_1=10.0\,\text{k}\Omega; resulting frequency 2.38kHz2.38\,\text{kHz}.
Initially thigh=0.7(25.0×103)(20.0×109)=350μst_{\text{high}}=0.7(25.0\times10^3)(20.0\times10^{-9})=350\,\mu\text{s} and tlow=0.7(10.0×103)(20.0×109)=140μst_{\text{low}}=0.7(10.0\times10^3)(20.0\times10^{-9})=140\,\mu\text{s}. Hence T=490μsT=490\,\mu\text{s}, f=2040.8Hzf=2040.8\ldots\,\text{Hz} and duty cycle =350/490=0.714286=350/490=0.714286\ldots. The average power is 0.360(0.714286)=0.25714W0.360(0.714286\ldots)=0.25714\ldots\,\text{W}. The power limit requires duty cycle at most 0.240/0.360=2/30.240/0.360=2/3. Since duty cycle is (R1+R2)/(R1+2R2)(R_1+R_2)/(R_1+2R_2), setting it to 2/32/3 gives 3(R1+R2)=2(R1+2R2)3(R_1+R_2)=2(R_1+2R_2) and R1=R2=10.0kΩR_1=R_2=10.0\,\text{k}\Omega. The new period is 0.7[10.0+2(10.0)]×103(20.0×109)=420μs0.7[10.0+2(10.0)]\times10^3(20.0\times10^{-9})=420\,\mu\text{s}, so f=2.381kHzf=2.381\ldots\,\text{kHz}.5

3.13.6.1 · Principles of communication systems

Tier 1 · Easy

Mark scheme for 3.13.6.1 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Input transducer, transmitter, transmission channel, receiver, output transducer.
The message is first converted into an electrical signal by the input transducer. The transmitter sends a suitable signal through the channel. The receiver recovers the information and the output transducer converts it to the required output, so the stated order follows.2
02.1
  • The microphone converts sound energy into an electrical signal; the loudspeaker converts electrical energy into sound.
The microphone is the input transducer, so it changes the original sound into an electrical information signal. The loudspeaker is the output transducer and performs the reverse conversion to reproduce sound.2

Tier 2 · Standard

Mark scheme for 3.13.6.1 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • The transmitter converts the information into a suitable signal and supplies it to the channel; the channel carries the signal; the receiver selects the wanted signal and recovers its information.
Award one linked purpose per stage: the transmitter prepares the message for transmission, for example by using it to modulate a carrier and amplifying the result; the channel is the physical medium through which the signal travels; the receiver selects the required transmission from other signals and noise, then demodulates it to recover the information.3
02.1
  • The output transducer is faulty. The correct signal at the receiver output shows that the transmitter, channel and receiver have already conveyed and recovered the information.
A correct electrical waveform at the receiver output proves that information passed through the transmitter and channel and was recovered by the receiver. The remaining conversion from electrical energy to sound is performed by the output transducer, the loudspeaker, so that is the faulty block.3
03.1
  • The input transducer converts the water-level information into an electrical signal for the transmitter. The output transducer converts the recovered electrical signal into a visible indication of water level.
A water-level or pressure sensor is the input transducer: it changes a non-electrical physical quantity carrying the information into a corresponding electrical signal. After transmission and recovery, the output transducer changes that electrical signal into the required visible form, for example a meter movement or display reading. The two transducers therefore perform opposite conversions at the ends of the communication system.3

Tier 3 · Hard

Mark scheme for 3.13.6.1 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • A temperature sensor produces an electrical information signal; a transmitter encodes or modulates and launches it into a channel; a receiver selects and recovers it; a display converts it to a readable output, while channel noise can alter the received signal.
The input transducer is a temperature sensor that converts temperature into an electrical information signal. The transmitter prepares that signal for the chosen channel, for example by encoding it or modulating a carrier, and supplies sufficient power. The wire, fibre or radio path is the transmission channel. Noise or interference added mainly in the channel changes the received waveform and can reduce signal-to-noise ratio. The receiver selects the wanted signal and decodes or demodulates it. Finally, the output stage drives a display so the recovered information is presented as a temperature. Continuous repetition keeps the result real time.5
02.1
  • The first fault is in the transmission channel; the second fault is in the receiver or demodulator.
A correct transmitter output followed by no receiver input places the first fault between those test points, in the transmission channel. For the second symptom, the correct receiver input shows that the transmitter and channel are working, but distortion introduced by the receiver output places the fault in the receiver's decoding or demodulation stage.3
03.1
  • Greater transmitter power makes the signal entering the channel larger, so it remains larger relative to noise added by the channel after attenuation. Receiver gain acts only after that noise has been added and amplifies signal and noise together, leaving their ratio unchanged; it cannot recover detail already masked by noise.
The transmitter supplies signal power before the transmission channel. Raising that power increases the signal that remains at the receiver input after channel attenuation, but it does not increase noise generated later in the channel, so the signal-to-noise ratio can improve. Receiver amplification occurs after signal and channel noise have arrived together. It multiplies both by the same factor, so their ratio and the information quality do not improve. A receiver can raise the output level but cannot reconstruct variations already hidden by noise.4
04.1
  • Microphone \to transmitter \to first channel \to relay receiver \to relay transmitter \to second channel \to final receiver \to loudspeaker. The relay receiver recovers the information; the relay transmitter prepares and launches a new signal into the second channel.
The signal passes through the blocks in this order: microphone, transmitter, first channel, relay receiver, relay transmitter, second channel, final receiver and loudspeaker. At the relay, the receiver selects the wanted signal and recovers its information. The transmitter then prepares and launches a new signal carrying that information through the second channel.3
05.1
  • Outward: control transducer \to transmitter \to channel \to receiver \to actuator. Return: position sensor \to transmitter \to channel \to receiver \to display. Two chains are needed because the control and position information travel in opposite directions.
The outward chain is control transducer \to transmitter \to channel \to receiver \to actuator, carrying the operator's command to the machine. The return chain is position sensor \to transmitter \to channel \to receiver \to display, carrying the measured position back. The information travels in opposite directions, so one one-way chain cannot perform both tasks.3

3.13.6.2 · Transmission media

Tier 1 · Easy

Mark scheme for 3.13.6.2 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Optical fibre, because it has high bandwidth and does not radiate a signal that can easily be intercepted.
Optical fibre supports a high data rate because of its large available bandwidth. Light remains guided within the fibre, so interception generally requires physical access and is easier to detect than receiving a broadcast radio signal.2
02.1
  • Microwaves have short wavelengths and diffract very little, so Earth or other obstacles can block the beam.
The short wavelength produces little diffraction around large obstacles. The transmitting and receiving aerials must therefore see each other above terrain and Earth's curvature.2

Tier 2 · Standard

Mark scheme for 3.13.6.2 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • A long-wavelength ground wave diffracts around Earth's surface; a sky wave is refracted or reflected by the ionosphere back towards Earth.
A ground wave of sufficiently long wavelength undergoes appreciable diffraction, so it follows the curvature of Earth's surface rather than being blocked at the geometric horizon. Alternatively, a sky wave is directed upwards and is refracted through, or described as reflected by, ionised layers in the atmosphere so that it returns to Earth at a distant point. Each route therefore avoids a purely line-of-sight path by a different wave process.4
02.1
  • Radio is more suitable for rapid, low-cost installation, but it is less secure because its broadcast signal is easier to intercept.
A radio link needs no trench or long physical cable, so it can be installed and moved quickly at lower initial cost. Its signal spreads through free space, however, so an unauthorised receiver can intercept it more easily. Buried copper provides a confined path and can be more physically secure, but excavation and cable installation make it slower and more costly for a temporary event.3
03.1
  • Use 200kHz200\,\text{kHz}: its wavelength is 1.50km1.50\,\text{km} and it can diffract as a ground wave, whereas the 5.00GHz5.00\,\text{GHz} wavelength is 0.0600m0.0600\,\text{m} and its microwave path is approximately line of sight.
For 200kHz200\,\text{kHz}, λ=c/f=(3.00×108)/(2.00×105)=1.50×103m\lambda=c/f=(3.00\times10^8)/(2.00\times10^5)=1.50\times10^3\,\text{m}. This long wavelength diffracts appreciably around terrain and Earth's surface, allowing ground-wave reception beyond the horizon. For 5.00GHz5.00\,\text{GHz}, λ=(3.00×108)/(5.00×109)=0.0600m\lambda=(3.00\times10^8)/(5.00\times10^9)=0.0600\,\text{m}. Such microwaves diffract very little around hills and normally require line of sight, so the 200kHz200\,\text{kHz} carrier is suitable.3

Tier 3 · Hard

Mark scheme for 3.13.6.2 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 0.240s0.240\,\text{s}; different frequencies prevent receiver de-sensing; fibre generally offers high data rate and greater physical security than a broadcast satellite link.
The minimum path is ground to satellite and back to ground, so d=2(3.60×107)=7.20×107md=2(3.60\times10^7)=7.20\times10^7\,\text{m}. The delay is t=d/c=(7.20×107)/(3.00×108)=0.240st=d/c=(7.20\times10^7)/(3.00\times10^8)=0.240\,\text{s}. A satellite transmits the downlink while receiving the much weaker uplink; separating their frequencies prevents its own strong transmission from overwhelming, or de-sensing, the receiver. Satellite microwave links cover large areas without laying cable but broadcast through free space and have limited allocated bandwidth. Optical fibre commonly provides a higher data rate and confines the signal to a physical cable, making interception harder, although laying that cable can be costly.6
02.1
  • Optical fibre: transfer time 3.0s3.0\,\text{s}. Radio would take 15s15\,\text{s} and copper 30s30\,\text{s}; fibre also confines the signal and is harder to intercept.
750MB=750×8=6000Mbit750\,\text{MB}=750\times8=6000\,\text{Mbit}. Fibre takes 6000/2000=3.0s6000/2000=3.0\,\text{s}, radio takes 6000/400=15s6000/400=15\,\text{s} and copper takes 6000/200=30s6000/200=30\,\text{s}. Only fibre meets the 5.0s5.0\,\text{s} limit. Its guided light remains within the installed cable, so interception normally requires physical access and is more difficult than receiving a radio broadcast.4
03.1
  • The minimum reduction factor is 2.5×1062.5\times10^6; select the 1.0×1071.0\times10^7 filter, which leaves 2.0×1013W2.0\times10^{-13}\,\text{W} of leakage.
The greatest permitted leakage is 0.10(8.0×1012)=8.0×1013W0.10(8.0\times10^{-12})=8.0\times10^{-13}\,\text{W}. The required reduction factor is therefore (2.0×106)/(8.0×1013)=2.5×106(2.0\times10^{-6})/(8.0\times10^{-13})=2.5\times10^6. A factor of 1.0×1061.0\times10^6 is insufficient. The 1.0×1071.0\times10^7 filter leaves (2.0×106)/(1.0×107)=2.0×1013W(2.0\times10^{-6})/(1.0\times10^7)=2.0\times10^{-13}\,\text{W}, which is below the permitted value.4
04.1
  • The direct horizon range is 55.9km55.9\,\text{km}, so the stations are not in line of sight. One midpoint relay is sufficient: the two section limits are 41.8km41.8\,\text{km} and 49.8km49.8\,\text{km}, each exceeding 35.0km35.0\,\text{km}.
The horizon distances are 2(6.37×106)(45.0)=23.94km\sqrt{2(6.37\times10^6)(45.0)}=23.94\ldots\,\text{km} and 2(6.37×106)(80.0)=31.92km\sqrt{2(6.37\times10^6)(80.0)}=31.92\ldots\,\text{km}. Their sum is 55.87km55.87\ldots\,\text{km}, less than 70.0km70.0\,\text{km}. For the relay, dr=2(6.37×106)(25.0)=17.85kmd_r=\sqrt{2(6.37\times10^6)(25.0)}=17.85\ldots\,\text{km}. The line-of-sight limits are therefore 23.94+17.85=41.79km23.94\ldots+17.85\ldots=41.79\ldots\,\text{km} and 31.92+17.85=49.77km31.92\ldots+17.85\ldots=49.77\ldots\,\text{km}. Each exceeds the corresponding 35.0km35.0\,\text{km} section, so one relay is sufficient.5
05.1
  • Greatest one-hop ground distance 846km846\,\text{km}; minimum 44 hops; equal-hop angle 56.856.8^\circ to the vertical (accept 56.756.7^\circ to 56.856.8^\circ).
For half a symmetrical hop, the vertical side is 225km225\,\text{km} and the greatest permitted horizontal side is 225tan62.0225\tan62.0^\circ. The greatest full ground distance is therefore 2(225)tan62.0=846.326km2(225)\tan62.0^\circ=846.326\ldots\,\text{km}. Since 2750/846.326=3.2492750/846.326\ldots=3.249\ldots, three hops are insufficient and at least four are required. Four equal hops each cover 2750/4=687.5km2750/4=687.5\,\text{km}, so each half-hop has horizontal length 343.75km343.75\,\text{km}. Hence tanθ=343.75/225\tan\theta=343.75/225 and θ=56.793\theta=56.793\ldots^\circ, which is within the aerial's radiation limit.5

3.13.6.3 · Time-division multiplexing

Tier 1 · Easy

Mark scheme for 3.13.6.3 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 44 slots; 3232 data bits
There is one slot per channel, so each frame has 44 slots. Each slot contains 88 bits, giving 4×8=324\times8=32 data bits per frame.2
02.1
  • 50μs50\,\mu\text{s}
The frame duration is the reciprocal of frame rate: T=1/(2.0×104)=5.0×105s=50μsT=1/(2.0\times10^4)=5.0\times10^{-5}\,\text{s}=50\,\mu\text{s}.1

Tier 2 · Standard

Mark scheme for 3.13.6.3 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Frame rate 8.0kHz8.0\,\text{kHz}; slot rate 48kslot s148\,\text{kslot s}^{-1}; bit rate 480kbit s1480\,\text{kbit s}^{-1}.
Every frame must carry one new sample from each channel, so the frame rate equals the sampling rate, 8.0kframe s18.0\,\text{kframe s}^{-1}. There are six slots per frame, hence the slot rate is 6(8.0×103)=4.8×104slot s16(8.0\times10^3)=4.8\times10^4\,\text{slot s}^{-1}. Each slot contains 1010 bits, so the bit rate is (4.8×104)(10)=4.8×105bit s1=480kbit s1(4.8\times10^4)(10)=4.8\times10^5\,\text{bit s}^{-1}=480\,\text{kbit s}^{-1}.4
02.1
  • 12.0kHz12.0\,\text{kHz}
Each frame contains 5(12)+5=655(12)+5=65 bits. The greatest frame rate is (780×103)/65=12.0×103frame s1(780\times10^3)/65=12.0\times10^3\,\text{frame s}^{-1}. One sample from each channel is carried per frame, so each channel can be sampled at 12.0kHz12.0\,\text{kHz}.2
03.1
  • The receiver loses the frame boundary, so it groups the following bits into the wrong slot positions. Samples are corrupted or routed to the wrong channels until a later synchronisation marker restores the correct AA, BB, CC slot order.
The synchronisation bit marks where the repeating frame starts. If it is lost, the receiver's bit groups no longer coincide with the transmitted slot boundaries, so the demultiplexer cannot reliably assign the next groups to AA, BB and CC. The displaced groups either combine bits from adjacent samples or are sent to the wrong output. Correct separation resumes only when the receiver recognises a later synchronisation marker and restores the frame boundary and slot order.3

Tier 3 · Hard

Mark scheme for 3.13.6.3 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • Frame rate 12.0kHz12.0\,\text{kHz}; data-slot rate 288kslot s1288\,\text{kslot s}^{-1}; 296296 bits per frame; bit rate 3.55Mbit s13.55\,\text{Mbit s}^{-1}; the link is sufficient.
One sample per channel is sent in each frame, so the frame rate is 12.0×103frame s112.0\times10^3\,\text{frame s}^{-1}. With 2424 data slots per frame, the data-slot rate is 24(12.0×103)=2.88×105slot s124(12.0\times10^3)=2.88\times10^5\,\text{slot s}^{-1}. Data occupy 24×12=28824\times12=288 bits and synchronisation adds 88, giving 296296 bits per frame. The bit rate is 296(12.0×103)=3.552×106bit s1=3.55Mbit s1296(12.0\times10^3)=3.552\times10^6\,\text{bit s}^{-1}=3.55\,\text{Mbit s}^{-1}. Since 3.55<4.003.55<4.00, the link is sufficient, with about 0.45Mbit s10.45\,\text{Mbit s}^{-1} spare capacity.6
02.1
  • 352kbit s1352\,\text{kbit s}^{-1}; synchronisation identifies each frame so the receiver assigns successive time slots to the correct channels.
Each frame contains 4(10)+4=444(10)+4=44 bits. The bit rate is 44(8.0×103)=3.52×105bit s1=352kbit s144(8.0\times10^3)=3.52\times10^5\,\text{bit s}^{-1}=352\,\text{kbit s}^{-1}. The synchronisation bits mark the frame boundary, allowing the receiver to demultiplex the repeating time slots in order and route each sample to its channel.3
03.1
  • 1010 channels; yes, because 4.00kHz>2(1.50kHz)4.00\,\text{kHz}>2(1.50\,\text{kHz}).
One sample per channel per frame means that the frame rate is the common sampling rate, 4.00×103s14.00\times10^3\,\text{s}^{-1}. The number of bits in each frame is (512×103)/(4.00×103)=128(512\times10^3)/(4.00\times10^3)=128. Removing the 88 synchronisation bits leaves 120120 sample bits, so the number of channels is 120/12=10120/12=10. Nyquist requires a sampling rate of at least 2fmax=2(1.50)=3.00kHz2f_{\max}=2(1.50)=3.00\,\text{kHz}. The actual 4.00kHz4.00\,\text{kHz} rate is greater than this, so it satisfies the condition.3
04.1
  • Slots per master frame: A:4A:4, B:2B:2, C:1C:1; 8686 bits per master frame; bit rate 258kbit s1258\,\text{kbit s}^{-1}.
At 3.00kframe s13.00\,\text{kframe s}^{-1}, channel AA needs 12.0/3.00=412.0/3.00=4 samples per frame, BB needs 6.00/3.00=26.00/3.00=2 and CC needs 3.00/3.00=13.00/3.00=1. Their data occupy 4(10)+2(12)+1(16)=804(10)+2(12)+1(16)=80 bits. Adding 66 synchronisation bits gives 8686 bits per master frame. The bit rate is 86(3.00×103)=2.58×105bit s1=258kbit s186(3.00\times10^3)=2.58\times10^5\,\text{bit s}^{-1}=258\,\text{kbit s}^{-1}.5
05.1
  • 6060 spare bits per frame; at most 66 sensors.
The link permits (1.12×106)/8000=140(1.12\times10^6)/8000=140 bits per frame. The six audio samples and synchronisation use 6(12)+8=806(12)+8=80 bits, leaving 14080=60140-80=60 spare bits. Each sensor needs 1010 bits in every frame, so the number that fit is 60/10=660/10=6.2

3.13.6.4 · Amplitude (AM) and frequency modulation (FM) techniques

Tier 1 · Easy

Mark scheme for 3.13.6.4 Tier 1 · Easy
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • 12kHz12\,\text{kHz}
Simple AM has two sidebands, so its bandwidth is 2fm=2(6.0kHz)=12kHz2f_m=2(6.0\,\text{kHz})=12\,\text{kHz}.2
02.1
  • Frequency modulation
Changing cycle spacing means that the instantaneous carrier frequency varies. Since the amplitude stays constant, the description is FM rather than AM.1

Tier 2 · Standard

Mark scheme for 3.13.6.4 Tier 2 · Standard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • FM 66kHz66\,\text{kHz}; AM 16kHz16\,\text{kHz}
For FM, B=2(Δf+fm)=2(25+8.0)kHz=66kHzB=2(\Delta f+f_m)=2(25+8.0)\,\text{kHz}=66\,\text{kHz}. For AM, B=2fm=2(8.0kHz)=16kHzB=2f_m=2(8.0\,\text{kHz})=16\,\text{kHz}.4
02.1
  • Carrier: 1.438MHz1.438\,\text{MHz}; lower and upper sidebands: 1.431MHz1.431\,\text{MHz} and 1.445MHz1.445\,\text{MHz}; highest information frequency: 7kHz7\,\text{kHz}; occupied bandwidth: 14kHz14\,\text{kHz}.
The carrier is the central line, 1.438MHz1.438\,\text{MHz}, and the equally spaced outer lines are the lower and upper sidebands. Their separation from the carrier is (1.4381.431)MHz=0.007MHz=7kHz(1.438-1.431)\,\text{MHz}=0.007\,\text{MHz}=7\,\text{kHz}, so this is the highest information frequency. The occupied bandwidth is the full sideband span, (1.4451.431)MHz=0.014MHz=14kHz(1.445-1.431)\,\text{MHz}=0.014\,\text{MHz}=14\,\text{kHz}.3
03.1
  • Carrier frequency 96.000MHz96.000\,\text{MHz}; maximum deviation 75.0kHz75.0\,\text{kHz}; bandwidth 174kHz174\,\text{kHz}.
The unmodulated carrier is the midpoint, (95.925+96.075)/2=96.000MHz(95.925+96.075)/2=96.000\,\text{MHz}. The maximum deviation is half the range, (96.07595.925)/2=0.0750MHz=75.0kHz(96.075-95.925)/2=0.0750\,\text{MHz}=75.0\,\text{kHz}. Hence B=2(Δf+fM)=2(75.0+12.0)kHz=174kHzB=2(\Delta f+f_M)=2(75.0+12.0)\,\text{kHz}=174\,\text{kHz}.3

Tier 3 · Hard

Mark scheme for 3.13.6.4 Tier 3 · Hard
QuestionAnswersAdditional comments/GuidelinesMark
01.1
  • FM bandwidth 180kHz180\,\text{kHz} and 55 channels; AM bandwidth 30kHz30\,\text{kHz} and 3030 channels. FM better rejects amplitude noise but accommodates fewer channels.
For FM, B=2(Δf+fm)=2(75+15)kHz=180kHzB=2(\Delta f+f_m)=2(75+15)\,\text{kHz}=180\,\text{kHz}. The ideal channel count is 900/180=5900/180=5. For AM, B=2fm=2(15)=30kHzB=2f_m=2(15)=30\,\text{kHz}, so 900/30=30900/30=30 ideal channels. In FM the information is carried by frequency changes, so amplitude-limiting can remove much amplitude noise without removing the information, giving a better signal-to-noise performance. Its larger bandwidth, however, means far fewer stations fit the same allocation. These ideal counts ignore guard bands.6
02.1
  • Carrier frequency 250kHz250\,\text{kHz}; information frequency 2.0kHz2.0\,\text{kHz}.
The carrier frequency is the number of carrier cycles divided by the elapsed time: fc=125/(0.50×103)=2.5×105Hz=250kHzf_c=125/(0.50\times10^{-3})=2.5\times10^5\,\text{Hz}=250\,\text{kHz}. The cycle-spacing pattern repeats every 0.50ms0.50\,\text{ms}, so fm=1/(0.50×103)=2.0×103Hz=2.0kHzf_m=1/(0.50\times10^{-3})=2.0\times10^3\,\text{Hz}=2.0\,\text{kHz}.2
03.1
  • Greatest information frequency 17.0kHz17.0\,\text{kHz}; minimum frequency deviation 51.0kHz51.0\,\text{kHz}.
At the greatest possible information frequency the deviation takes its smallest allowed value, Δf=3fM\Delta f=3f_M. Substitution into B=2(Δf+fM)B=2(\Delta f+f_M) gives 136=2(3fM+fM)=8fM136=2(3f_M+f_M)=8f_M. Hence fM=136/8=17.0kHzf_M=136/8=17.0\,\text{kHz} and Δf=3(17.0)=51.0kHz\Delta f=3(17.0)=51.0\,\text{kHz}.2
04.1
  • The first transmission occupies 711711 to 729kHz729\,\text{kHz} and the second occupies 733733 to 759kHz759\,\text{kHz}; the unused interval is 4.00kHz4.00\,\text{kHz}.
For AM, the occupied frequencies extend by the highest information frequency either side of the carrier. The first range is 720±9.00kHz720\pm9.00\,\text{kHz}, or 711711 to 729kHz729\,\text{kHz}. The second is 746±13.0kHz746\pm13.0\,\text{kHz}, or 733733 to 759kHz759\,\text{kHz}. The interval from 729729 to 733kHz733\,\text{kHz} is 4.00kHz4.00\,\text{kHz}.3
05.1
  • Worst-case greatest information frequency 36.0kHz36.0\,\text{kHz} and bandwidth 176kHz176\,\text{kHz}.
In the worst case, carrier drift uses 7.00kHz7.00\,\text{kHz} of the 95.0kHz95.0\,\text{kHz} allowance on one side. The remaining spectral half-width is 95.07.00=88.0kHz95.0-7.00=88.0\,\text{kHz}. Since the half-width from the actual carrier is Δf+fM\Delta f+f_M, 52.0+fM88.052.0+f_M\leq88.0, so fM=36.0kHzf_M=36.0\,\text{kHz} at the limit. The bandwidth is then 2(52.0+36.0)=176kHz2(52.0+36.0)=176\,\text{kHz}.2