AQA A-level Physics coverage

Electronics (A-level only)

Section 3.13
18 spec leafs
Optional · choose 1 of 5

Notes and three levels of exam-style practice for each registered specification leaf in this section.

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3.13.1.1

MOSFET (metal-oxide semiconducting field-effect transistor)

  • An enhancement-mode n-channel MOSFET has gate, drain and source terminals. A silicon dioxide layer insulates the gate from the channel, giving a very large input resistance and negligible steady gate current.
  • The gate-source potential difference VGSV_{\mathrm{GS}} controls the drain current. Below the threshold VthV_{\mathrm{th}} the device is effectively off; above threshold a conducting channel forms, but VGS=VthV_{\mathrm{GS}}=V_{\mathrm{th}} does not mean the MOSFET is fully on.
  • As a low-side switch, the source is connected to 0V0\,\text{V} and the load lies between the positive supply and the drain. A pull-down resistor prevents an unconnected insulated gate from retaining charge.
  • For a resistive drain load, the load line is VDS=VSIDRV_{\mathrm{DS}}=V_{\mathrm{S}}-I_{\mathrm{D}}R. Its intersection with the output characteristic gives the operating point; exam answers should check that the point lies in the assumed region.
  • A common error is to treat the MOSFET as a current-operated device or to ignore its power P=IDVDSP=I_{\mathrm{D}}V_{\mathrm{DS}} when judging whether it is acting as an efficient switch.

Tier 1 · Easy

1 mark
ORIGINAL

State the condition involving VGSV_{\mathrm{GS}} and VthV_{\mathrm{th}} for an enhancement-mode n-channel MOSFET to begin conducting.

Tier 2 · Standard

3 marks
ORIGINAL

A 9.0V9.0\,\text{V} moisture alarm has a sensor of resistance RR from the positive supply to a MOSFET gate and a 1.5MΩ1.5\,\text{M}\Omega resistor from the gate to 0V0\,\text{V}. The MOSFET threshold voltage is 3.0V3.0\,\text{V}. Determine RR when the MOSFET first switches on.

Tier 3 · Hard

5 marks
ORIGINAL

A MOSFET controls a 150Ω150\,\Omega load from a 12.0V12.0\,\text{V} supply. At the applied gate voltage its output characteristic is approximated by ID=65mAI_{\mathrm{D}}=65\,\text{mA} for VDS2.0VV_{\mathrm{DS}}\geq2.0\,\text{V}. Use load-line reasoning to determine the operating values of VDSV_{\mathrm{DS}}, load power and MOSFET power. Deduce whether the MOSFET is acting as an efficient fully-on switch.

3.13.1.2

Zener diode

  • A Zener diode is used in reverse bias. At its breakdown voltage VZV_{\mathrm{Z}}, a large change in reverse current produces only a small change in potential difference, so it can provide a stabilised reference voltage.
  • A series resistor is essential to limit current. With no load, RS=(VinVZ)/IZR_{\mathrm{S}}=(V_{\mathrm{in}}-V_{\mathrm{Z}})/I_{\mathrm{Z}}; with a parallel load, the resistor current is IS=IZ+ILI_{\mathrm{S}}=I_{\mathrm{Z}}+I_{\mathrm{L}}.
  • A regulator must keep IZI_{\mathrm{Z}} above its minimum value at minimum supply voltage and maximum load current, then satisfy Zener and resistor power ratings at maximum supply voltage and minimum load current.
  • The Zener power is PZ=VZIZP_{\mathrm{Z}}=V_{\mathrm{Z}}I_{\mathrm{Z}} and the series-resistor power is PR=IS2RSP_{R}=I_{\mathrm{S}}^2R_{\mathrm{S}}. Quote a standard component rating above the calculated dissipation.
  • A common error is to size the resistor using only the load current: the resistor must carry both load current and the current needed to keep the Zener in breakdown.

Tier 1 · Easy

1 mark
ORIGINAL

State the bias direction and operating region used when a Zener diode provides a constant-voltage reference.

Tier 2 · Standard

3 marks
ORIGINAL

A no-load voltage reference uses a 5.6V5.6\,\text{V} Zener diode on a 12.0V12.0\,\text{V} supply. Calculate the series resistance required for a Zener current of 16mA16\,\text{mA}.

Tier 3 · Hard

5 marks
ORIGINAL

A 6.2V6.2\,\text{V} Zener circuit is supplied from a fixed 14.0V14.0\,\text{V} source. The parallel load can draw up to 18mA18\,\text{mA} and the Zener needs at least 5.0mA5.0\,\text{mA}. Determine the largest suitable series resistor from 330Ω330\,\Omega, 360Ω360\,\Omega and 390Ω390\,\Omega, and then determine minimum safe power ratings for the resistor and Zener when the load is disconnected.

3.13.1.3

Photodiode

  • A photodiode converts incident radiation into a photocurrent. Within its linear range, the photocurrent is proportional to incident optical power or irradiance.
  • In photovoltaic mode there is no external bias. In photoconductive mode the diode is reverse biased, widening the depletion region and usually giving faster response and a wider useful linear range.
  • Responsivity SS has units A W1\text{A W}^{-1} and links optical power to current through Ip=SPI_{\mathrm{p}}=SP. A resistor or current-to-voltage amplifier then converts the small current into a measurable voltage.
  • Photodiodes can detect radiation directly or detect flashes from a scintillator when charged particles or gamma photons deposit energy in it.
  • A common error is to describe a photodiode as a light-dependent resistor. A photodiode produces a photocurrent; its polarity, operating mode and any graph scale must be read carefully.

Tier 1 · Easy

1 mark
ORIGINAL

Name the operating mode of a photodiode that has an external reverse-bias voltage.

Tier 2 · Standard

3 marks
ORIGINAL

A photodiode has responsivity 0.42A W10.42\,\text{A W}^{-1} at the wavelength used. Radiation of power 8.0μW8.0\,\mu\text{W} reaches it and its photocurrent passes through a 180kΩ180\,\text{k}\Omega resistor. Calculate the magnitude of the resistor voltage.

Tier 3 · Hard

5 marks
ORIGINAL

A particle deposits energy in a scintillator, producing a 25ns25\,\text{ns} optical pulse of constant power 4.0μW4.0\,\mu\text{W}. A reverse-biased photodiode has responsivity 0.48A W10.48\,\text{A W}^{-1} and its readout converts the photocurrent using 270kΩ270\,\text{k}\Omega. Explain how the particle is detected, then calculate the voltage-pulse magnitude and the number of charge carriers in the photocurrent. Use e=1.60×1019Ce=1.60\times10^{-19}\,\text{C}.

3.13.1.4

Hall effect sensor

  • A Hall effect sensor produces an output potential difference VHV_{\text{H}} that is proportional to the magnetic flux density through it; the specification requires this transfer behaviour and its uses, not the internal principle of operation.
  • For fixed sensor current and geometry, the Hall voltage obeys VHBV_{\mathrm{H}}\propto B. Reversing the magnetic-field direction reverses the polarity of the Hall-voltage change.
  • A practical Hall sensor may add the Hall voltage to a fixed offset, often near half the supply voltage. Use the change from the zero-field output rather than treating the whole output as VHV_{\mathrm{H}}.
  • The gradient of output voltage against magnetic flux density is the sensitivity. A monotonic calibration gives an unambiguous field or position; saturation or a turning point can make one voltage correspond to more than one input.
  • Hall sensors can measure magnetic field, proximity, position or rotation rate. A common error in speed questions is to forget how many magnets or magnetic sectors produce pulses per revolution.

Tier 1 · Easy

1 mark
ORIGINAL

The magnetic flux density through a Hall element doubles without changing its current or orientation. State the effect on its Hall voltage.

Tier 2 · Standard

3 marks
ORIGINAL

A Hall sensor has a zero-field output of 2.500V2.500\,\text{V} and sensitivity 45mV T145\,\text{mV T}^{-1}. Calculate its output for a flux density of 0.18T-0.18\,\text{T}.

Tier 3 · Hard

5 marks
ORIGINAL

A Hall sensor's output changes by 0.180V0.180\,\text{V} in a calibration field of 60mT60\,\text{mT}. In a speed monitor its peak output change is 0.120V0.120\,\text{V}. Six identical magnets on a wheel each produce one pulse, and the pulse frequency is 180Hz180\,\text{Hz}. Determine the peak magnetic flux density at the sensor and the wheel speed in revolutions per minute. Explain how the field calculation uses the Hall effect.

3.13.2.1

Difference between analogue and digital signals

  • An analogue signal varies continuously in time and amplitude. A digital signal uses discrete levels, normally binary 00 and 11, during defined time intervals.
  • Analogue-to-digital conversion samples the signal and assigns each sample to one of 2n2^n quantised levels for an nn-bit code. Quantisation causes an unavoidable rounding error.
  • The sampling frequency must be at least twice the highest information frequency to avoid aliasing. A higher sampling rate records more time detail, while a greater bit depth improves amplitude resolution.
  • Digital pulses can be regenerated, copied and processed without accumulating small amounts of noise at every stage, provided noise has not shifted a pulse across the decision threshold.
  • Higher sampling rate and bit depth increase bit rate, storage and transmission bandwidth. A common error is to claim that digital signals contain no noise or reproduce the original analogue signal exactly.

Tier 1 · Easy

1 mark
ORIGINAL

State one difference between an analogue signal and a binary digital signal.

Tier 2 · Standard

3 marks
ORIGINAL

An 88-bit converter divides an input range from 00 to 4.8V4.8\,\text{V} into equal quantisation intervals. Calculate the interval width and the maximum quantisation error.

Tier 3 · Hard

5 marks
ORIGINAL

A sensor signal contains frequencies up to 4.0kHz4.0\,\text{kHz}. It is sampled at 10kHz10\,\text{kHz} with 1414 bits per sample for 45s45\,\text{s}. Explain whether the sampling rate is sufficient, calculate the uncompressed data size in bits and bytes, and discuss one consequence of reducing the resolution to 88 bits.

3.13.3.1

LC resonance filters

  • At resonance, energy transfers repeatedly between the electric field of the capacitor and the magnetic field of the inductor. The resonant frequency is f0=1/(2πLC)f_0=1/(2\pi\sqrt{LC}).
  • Use LL in henries, CC in farads and f0f_0 in hertz. When rearranging for capacitance, C=1/(4π2f02L)C=1/(4\pi^2f_0^2L).
  • The response of a tuned parallel LC filter is centred on f0f_0. Depending on where the output is taken, resonance can produce a peak or a notch.
  • The bandwidth Δf\Delta f is the separation of the upper and lower half-power frequencies, and the quality factor is Q=f0/ΔfQ=f_0/\Delta f. A larger QQ means a narrower response and greater selectivity.
  • A common error is to use one half-width as Δf\Delta f, or to read the bandwidth at half the peak amplitude rather than the half-power amplitude 1/21/\sqrt{2} of the peak.

Tier 1 · Easy

2 marks
ORIGINAL

Calculate the resonant frequency of an LC filter containing L=2.0mHL=2.0\,\text{mH} and C=8.0nFC=8.0\,\text{nF}.

Tier 2 · Standard

3 marks
ORIGINAL

A tuned circuit has a response peak at 150kHz150\,\text{kHz}. Its lower and upper half-power frequencies are 143kHz143\,\text{kHz} and 157kHz157\,\text{kHz}. Determine its bandwidth and Q-factor.

Tier 3 · Hard

5 marks
ORIGINAL

A receiver uses a 0.75mH0.75\,\text{mH} inductor in an LC filter tuned to 620kHz620\,\text{kHz}. Its measured half-power frequencies are 609kHz609\,\text{kHz} and 631kHz631\,\text{kHz}. Calculate the required capacitance and Q-factor. The wanted transmission occupies 18kHz18\,\text{kHz} centred on resonance; discuss whether the measured bandwidth is suitable.

3.13.3.2

The ideal operational amplifier

  • An ideal operational amplifier has infinite open-loop voltage gain, infinite input impedance and zero output impedance. Infinite input impedance means I+=I=0I_+=I_-=0.
  • With negative feedback and an unsaturated output, the enormous gain makes the differential input voltage negligible, so V+=VV_+=V_-. This is the virtual-short rule, not a physical connection between the inputs.
  • If the non-inverting input is connected to 0V0\,\text{V}, negative feedback holds the inverting input at approximately 0V0\,\text{V}. This node is a virtual earth: it has earth potential but is not connected directly to earth.
  • Zero output impedance means the output voltage is unaffected by the current supplied to an allowed load in the ideal model. The output adjusts as required to maintain the feedback condition.
  • The golden rules I+=I=0I_+=I_-=0 and V+=VV_+=V_- apply only with negative feedback and while the output is not saturated. A common error is to assume that both inputs are always at 0V0\,\text{V}.

Tier 1 · Easy

1 mark
ORIGINAL

State the current entering either input terminal of an ideal operational amplifier.

Tier 2 · Standard

3 marks
ORIGINAL

An ideal operational amplifier has negative feedback, its non-inverting input is connected to 0V0\,\text{V}, and its output is not saturated. State the potential of the inverting input and explain why that point is called a virtual earth.

Tier 3 · Hard

5 marks
ORIGINAL

The non-inverting terminal of an ideal op amp is earthed. A +0.80V+0.80\,\text{V} source is connected to the inverting node through 40kΩ40\,\text{k}\Omega, and negative feedback connects the output to that node through 200kΩ200\,\text{k}\Omega. The supply rails are ±6.0V\pm6.0\,\text{V}. Use the ideal-op-amp rules to determine the output voltage and verify that the assumed linear operation is possible.

3.13.4.1

Operational amplifier: inverting amplifier configuration

  • For an ideal operational amplifier with negative feedback, the two input potentials are equal and no current enters either input. With the non-inverting input earthed, the inverting input is therefore at virtual earth.
  • Applying Kirchhoff's current law at the inverting input gives Vin/Rin=Vout/RfV_{\text{in}}/R_{\text{in}}=-V_{\text{out}}/R_f, so the closed-loop voltage gain is Vout/Vin=Rf/RinV_{\text{out}}/V_{\text{in}}=-R_f/R_{\text{in}}.
  • The minus sign represents a 180180^\circ phase reversal. Resistance ratios set the gain, so both resistances must use the same units.
  • A real output cannot pass its supply-limited saturation levels. A common error is to report the ideal output even when it would be clipped.

Tier 1 · Easy

2 marks
ORIGINAL

An inverting amplifier has Rin=10kΩR_{\text{in}}=10\,\text{k}\Omega, Rf=47kΩR_f=47\,\text{k}\Omega and Vin=+0.60VV_{\text{in}}=+0.60\,\text{V}. Calculate VoutV_{\text{out}}.

Tier 2 · Standard

3 marks
ORIGINAL

The non-inverting input of an ideal operational amplifier is earthed. Its input and feedback resistors are 12kΩ12\,\text{k}\Omega and 68kΩ68\,\text{k}\Omega. Derive the closed-loop gain from currents at the inverting input, then determine the output for Vin=0.45VV_{\text{in}}=-0.45\,\text{V}.

Tier 3 · Hard

5 marks
ORIGINAL

An inverting amplifier has Rin=15kΩR_{\text{in}}=15\,\text{k}\Omega and Rf=120kΩR_f=120\,\text{k}\Omega. Its output saturates at ±8.0V\pm8.0\,\text{V}. A sinusoidal input has peak voltage 1.4V1.4\,\text{V}. Determine the ideal output peak, describe the actual output, and calculate the largest input peak that would avoid clipping.

3.13.4.2

Operational amplifier: non-inverting amplifier configuration

  • The signal is applied to the non-inverting input, so the output has the same polarity as the input.
  • Negative feedback makes V=V+=VinV_-=V_+=V_{\text{in}}. The feedback divider gives V=VoutR1/(R1+Rf)V_-=V_{\text{out}}R_1/(R_1+R_f) and hence Vout/Vin=1+Rf/R1V_{\text{out}}/V_{\text{in}}=1+R_f/R_1.
  • The closed-loop gain is always at least 11 and the ideal input resistance is infinite, so the source supplies negligible input current.
  • Check the calculated output against the saturation levels. A common error is to omit the 11 in the gain or to use the inverting-amplifier minus sign.

Tier 1 · Easy

2 marks
ORIGINAL

A non-inverting amplifier has R1=10kΩR_1=10\,\text{k}\Omega, Rf=39kΩR_f=39\,\text{k}\Omega and input voltage 0.80V0.80\,\text{V}. Calculate its output voltage.

Tier 2 · Standard

4 marks
ORIGINAL

In a non-inverting amplifier, R1=8.2kΩR_1=8.2\,\text{k}\Omega joins the inverting input to earth and Rf=33kΩR_f=33\,\text{k}\Omega joins the output to that input. Use the feedback-divider potential to derive the gain and calculate the output when Vin=0.50VV_{\text{in}}=0.50\,\text{V}.

Tier 3 · Hard

5 marks
ORIGINAL

A non-inverting amplifier uses R1=18kΩR_1=18\,\text{k}\Omega and Rf=82kΩR_f=82\,\text{k}\Omega. Its output saturates at ±11.5V\pm11.5\,\text{V}. Calculate the maximum peak-to-peak sinusoidal input that can be amplified without clipping, and state the corresponding output peak-to-peak voltage.

3.13.4.3

Operational amplifier: summing amplifier configuration

  • In an inverting summing amplifier the inverting input is at virtual earth, so input ii supplies current Vi/RiV_i/R_i to the summing point.
  • Kirchhoff's current law gives Vout=Rf(V1/R1+V2/R2+)V_{\text{out}}=-R_f(V_1/R_1+V_2/R_2+\cdots). Each input therefore has its own weighting Rf/Ri-R_f/R_i.
  • With matched resistor ratios, the related difference-amplifier configuration gives Vout=(Rf/R1)(V+V)V_{\text{out}}=(R_f/R_1)(V_+-V_-), amplifying the difference between two inputs.
  • Positive and negative input voltages contribute currents in opposite directions; retain their algebraic signs throughout the sum.
  • The calculated ideal sum is still limited by output saturation. A common error is to add voltage magnitudes and lose cancellation between inputs.

Tier 1 · Easy

2 marks
ORIGINAL

A summing amplifier has Rf=20kΩR_f=20\,\text{k}\Omega. Two inputs of 0.30V0.30\,\text{V} and 0.50V0.50\,\text{V} are each connected through 10kΩ10\,\text{k}\Omega. Calculate the output voltage.

Tier 2 · Standard

3 marks
ORIGINAL

A summing amplifier has Rf=60kΩR_f=60\,\text{k}\Omega. Inputs +0.90V+0.90\,\text{V}, 1.20V-1.20\,\text{V} and +0.50V+0.50\,\text{V} are connected through 15kΩ15\,\text{k}\Omega, 30kΩ30\,\text{k}\Omega and 20kΩ20\,\text{k}\Omega, respectively. Determine VoutV_{\text{out}}.

Tier 3 · Hard

6 marks
ORIGINAL

A summing amplifier has Rf=100kΩR_f=100\,\text{k}\Omega and saturates at 10.5V-10.5\,\text{V} on negative output. Inputs +1.20V+1.20\,\text{V}, 0.60V-0.60\,\text{V} and +1.50V+1.50\,\text{V} pass through 12kΩ12\,\text{k}\Omega, 30kΩ30\,\text{k}\Omega and 20kΩ20\,\text{k}\Omega. Calculate the ideal output, state the actual output, and find the value to which the third input must be reduced to put the amplifier just at the saturation boundary.

3.13.4.4

Real operational amplifiers

  • Real operational amplifiers have finite open-loop gain and input resistance, non-zero output resistance, limited output voltage and a frequency-dependent response.
  • For a given device, closed-loop gain multiplied by bandwidth is approximately constant: GfB=gain–bandwidth productGf_B=\text{gain--bandwidth product}. Increasing gain therefore reduces usable bandwidth.
  • Slew rate is the greatest possible dVout/dt|\mathrm{d}V_{\text{out}}/\mathrm{d}t|. A sine wave of peak VpV_p and frequency ff requires a maximum rate 2πfVp2\pi fV_p.
  • Check both bandwidth and slew rate, as well as saturation. A common error is to conclude that a signal is undistorted after testing only one limitation.

Tier 1 · Easy

2 marks
ORIGINAL

An operational amplifier has a gain--bandwidth product of 3.0MHz3.0\,\text{MHz}. Calculate its bandwidth when its closed-loop voltage gain is 3030.

Tier 2 · Standard

4 marks
ORIGINAL

A real operational amplifier has slew rate 1.5Vμs11.5\,\text{V}\,\mu\text{s}^{-1}. Determine whether it can produce an undistorted sine wave of frequency 80kHz80\,\text{kHz} and peak output 4.0V4.0\,\text{V}. Also calculate the greatest frequency allowed by the slew rate at this peak voltage.

Tier 3 · Hard

6 marks
ORIGINAL

An operational amplifier has gain--bandwidth product 4.0MHz4.0\,\text{MHz} and slew rate 0.80Vμs10.80\,\text{V}\,\mu\text{s}^{-1}. It is used at closed-loop gain 2525 to produce a 60kHz60\,\text{kHz} sine wave whose ideal output peak is 3.0V3.0\,\text{V}. Test both frequency limitations and calculate the largest undistorted output peak at this frequency.

3.13.5.1

Combinational logic

  • A combinational circuit's output depends only on its present inputs. Translate between Boolean expressions, gate networks and truth tables systematically.
  • Use A\overline{A} for NOT, ABA\cdot B for AND and A+BA+B for OR. EOR is 11 only when its two inputs differ.
  • NAND is a universal gate: A=A NANDA\overline{A}=A\operatorname{\ NAND}A, and repeated NAND operations can construct AND, OR and any larger logic function.
  • List binary input combinations in a fixed order and evaluate intermediate columns before the final output. A common error is to treat Boolean ++ as ordinary addition.

Tier 1 · Easy

2 marks
ORIGINAL

For the Boolean function Y=ABY=A\cdot\overline{B}, state the four values of YY for inputs AB=00,01,10,11AB=00,01,10,11 in that order.

Tier 2 · Standard

3 marks
ORIGINAL

A two-input circuit must output 11 for AB=01AB=01 and AB=10AB=10, but 00 for AB=00AB=00 and AB=11AB=11. Identify the single gate that performs this function and write an equivalent Boolean expression using only AND, OR and NOT.

Tier 3 · Hard

6 marks
ORIGINAL

A control output is Y=(A+B)CY=(A+B)\cdot\overline{C}. Construct its eight-row truth-table output with ABCABC in ascending binary order from 000000 to 111111, then describe a NAND-only implementation.

3.13.5.2

Sequential logic

  • A sequential circuit has memory: its output depends on the present input and its previous state. A clock controls state changes, while reset forces a defined starting state.
  • An nn-stage binary counter has 2n2^n states. A BCD counter runs through decimal 00 to 99 before returning to 00.
  • A Johnson counter with nn stages has 2n2n distinct states. The inverted final output is fed back to the first stage and the pattern advances on clock edges.
  • A modulo-nn counter can be made by decoding state nn and driving reset, leaving states 00 to n1n-1. State the bit order explicitly; a common error is to confuse decimal count with its binary output.

Tier 1 · Easy

2 marks
ORIGINAL

A three-bit up-counter is reset to 000000. State its output after five clock pulses, writing the most significant bit first.

Tier 2 · Standard

4 marks
ORIGINAL

State the number of distinct states of a four-stage Johnson counter and of a four-bit BCD counter. A BCD counter receives a 1.20kHz1.20\,\text{kHz} clock; determine the rate at which it completes full count cycles.

Tier 3 · Hard

6 marks
ORIGINAL

A three-bit up-counter is converted to a modulo-66 counter by decoding one state to reset it. Identify the decoded reset state, list the stable count sequence, determine the output after 5353 pulses from reset, and calculate the cycle rate for a 24kHz24\,\text{kHz} clock.

3.13.5.3

Astables

  • An astable has no stable state: it oscillates continuously and can supply clock pulses without an external trigger.
  • Period and frequency obey f=1/Tf=1/T. Duty cycle is thigh/T×100%t_{\text{high}}/T\times100\%, and mark-to-space ratio is thigh:tlowt_{\text{high}}:t_{\text{low}}.
  • An external resistor-capacitor network sets the charging and discharging times. For a common astable design that charges exponentially between VS/3V_S/3 and 2VS/32V_S/3, each threshold interval is RCln2RC\ln2 — no particular chip or circuit is required by the specification, so questions supply the thresholds.
  • Use the actual threshold interval rather than assuming the time constant equals the switching time. A common error is to include only charging time when finding a full period.

Tier 1 · Easy

2 marks
ORIGINAL

An astable produces a pulse train of period 2.5ms2.5\,\text{ms} with a high pulse lasting 1.0ms1.0\,\text{ms}. Calculate the frequency and duty cycle.

Tier 2 · Standard

4 marks
ORIGINAL

In an astable, a capacitor charges through 47kΩ47\,\text{k}\Omega from VS/3V_S/3 to 2VS/32V_S/3 and then discharges through the same resistance over the reverse threshold interval. The capacitance is 22nF22\,\text{nF}. Using exponential charging, determine the period and frequency.

Tier 3 · Hard

6 marks
ORIGINAL

An astable capacitor switches between VS/3V_S/3 and 2VS/32V_S/3, with the output high while the capacitor charges. It charges through 82kΩ82\,\text{k}\Omega, discharges through 33kΩ33\,\text{k}\Omega, and has capacitance 15nF15\,\text{nF}. Calculate the high time, low time, frequency, duty cycle and mark-to-space ratio, taking each threshold time as RCln2RC\ln2.

3.13.6.1

Principles of communication systems

  • A real-time communication system can be represented by input transducer, transmitter, transmission channel, receiver and output transducer.
  • The input transducer converts the message into an electrical signal; the transmitter prepares it for the channel, which carries it to the receiver.
  • The receiver selects and recovers the information signal, and the output transducer converts it into the required final form.
  • State the purpose of each stage rather than circuit detail. A common error is to describe the carrier as the information itself instead of the wave altered to carry information.

Tier 1 · Easy

2 marks
ORIGINAL

Place these stages of a real-time communication system in order: receiver, output transducer, transmission channel, input transducer, transmitter.

Tier 2 · Standard

3 marks
ORIGINAL

In a live radio link, explain the different purposes of the transmitter, transmission channel and receiver.

Tier 3 · Hard

5 marks
ORIGINAL

A remote weather station sends a continuously updated temperature reading to a control room. Describe a complete real-time communication system for this task, giving the purpose of each block and explaining where unwanted noise can affect the recovered reading.

3.13.6.2

Transmission media

  • Transmission paths include metal wire, optical fibre and electromagnetic waves such as radio and microwave. Compare them using data rate, attenuation, cost and security.
  • Typical ranges are about 150150--300kHz300\,\text{kHz} for longwave, 33--30MHz30\,\text{MHz} for shortwave and 22--100GHz100\,\text{GHz} for microwave links.
  • Long-wavelength radio can diffract around Earth's surface as a ground wave; suitable sky waves can be refracted or reflected by the ionosphere to reach beyond the horizon.
  • Microwaves are approximately line-of-sight and are used for terrestrial links and satellites. Satellite uplinks and downlinks use different frequencies to prevent receiver de-sensing.
  • Optical fibre offers high data capacity and is difficult to intercept, but installation and optical interfaces add cost. A common error is to claim that all radio waves travel only in straight lines.

Tier 1 · Easy

2 marks
ORIGINAL

Identify a suitable transmission medium for a high-data-rate link that should be difficult to intercept, and give one reason for your choice.

Tier 2 · Standard

4 marks
ORIGINAL

Explain two ways in which a radio transmission can reach a receiver beyond the horizon, and relate each way to the wave behaviour involved.

Tier 3 · Hard

6 marks
ORIGINAL

A signal travels from one ground station to another through a geostationary satellite 3.60×107m3.60\times10^7\,\text{m} above Earth. Treat both path sections as vertical and use c=3.00×108m s1c=3.00\times10^8\,\text{m s}^{-1}. Calculate the minimum one-way delay, explain why uplink and downlink frequencies differ, and compare this link with optical fibre for data rate and security.

3.13.6.3

Time-division multiplexing

  • Time-division multiplexing shares one transmission path by assigning each input channel a recurring time slot within every frame.
  • One frame normally contains one slot from each channel, so frame rate equals the sampling rate per channel and slot rate equals number of channels multiplied by frame rate.
  • The raw bit rate is frame rate multiplied by all bits in one frame, including synchronisation or control bits as well as data bits.
  • The receiver uses timing or synchronisation information to demultiplex the slots. A common error is to omit overhead bits or multiply by the number of channels twice.

Tier 1 · Easy

2 marks
ORIGINAL

Four channels share a time-division multiplexed link. Each frame contains one 88-bit slot from every channel. State the number of slots and the number of data bits in one frame.

Tier 2 · Standard

4 marks
ORIGINAL

Six signals are each sampled at 8.0kHz8.0\,\text{kHz} and represented by 1010 bits per sample. One sample from each signal forms a TDM frame with no overhead. Calculate the frame rate, slot rate and transmitted bit rate.

Tier 3 · Hard

6 marks
ORIGINAL

A TDM system carries 2424 channels, each sampled at 12.0kHz12.0\,\text{kHz} with 1212 bits per sample. Every frame also contains 88 synchronisation bits. Calculate the frame rate, data-slot rate, total bits per frame and transmitted bit rate. Decide whether a 4.00Mbit s14.00\,\text{Mbit s}^{-1} link has sufficient capacity.

3.13.6.4

Amplitude (AM) and frequency modulation (FM) techniques

  • Modulation changes a high-frequency carrier in accordance with a lower-frequency information signal. AM varies carrier amplitude; FM varies instantaneous carrier frequency while amplitude remains approximately constant.
  • For a single information frequency fmf_m, simple AM requires bandwidth 2fm2f_m. Simple FM requires approximately 2(Δf+fm)2(\Delta f+f_m), where Δf\Delta f is the maximum frequency deviation.
  • On a time graph, carrier frequency comes from the rapid oscillations and information frequency from the slower envelope repetition in AM or the frequency-change pattern in FM.
  • FM generally gives better immunity to amplitude noise but uses more bandwidth, so fewer channels fit a fixed allocation. A common error is to use only one AM sideband and quote bandwidth fmf_m.

Tier 1 · Easy

2 marks
ORIGINAL

An AM transmission carries a highest information frequency of 6.0kHz6.0\,\text{kHz}. Calculate its minimum bandwidth.

Tier 2 · Standard

4 marks
ORIGINAL

A signal with maximum information frequency 8.0kHz8.0\,\text{kHz} frequency-modulates a carrier with maximum deviation 25kHz25\,\text{kHz}. Calculate the FM bandwidth and the bandwidth if the same information used AM.

Tier 3 · Hard

6 marks
ORIGINAL

A broadcast signal has maximum information frequency 15kHz15\,\text{kHz}. In FM its maximum frequency deviation is 75kHz75\,\text{kHz}. Calculate the FM and AM bandwidths and hence the greatest ideal number of non-overlapping channels of each type in a 900kHz900\,\text{kHz} allocation. Explain one signal-to-noise advantage and one channel-usage disadvantage of FM.